From: Maynard Johnson <maynardj@us.ibm.com>
To: Victor Jimenez <victor.javier@bsc.es>
Cc: linux-perf-users@vger.kernel.org
Subject: Re: Sampling instruction pointer on PPC
Date: Thu, 01 Mar 2012 13:49:56 -0600 [thread overview]
Message-ID: <4F4FD2E4.9090500@us.ibm.com> (raw)
In-Reply-To: <4F4FACFA.6080209@bsc.es>
On 03/01/2012 11:08 AM, Victor Jimenez wrote:
> I am trying to sample instruction pointer along time on a Power7 system. I know
> that there are accurate mechanisms to do so in Intel processors (e.g., PEBS and
> Branch Trace Store).
>
> Is it possible to do something similar in Power7? Will the samples be accurate?
> I am worried that significant delays (skids) may appear.
Victor,
There's a subset of events that have a prefix of "PM_MRK_". These are referred
to as "marked events". When profiling with such events, the PMU will randomly
select (mark) an instruction in a group and follow it through the pipeline. By
profiling on marked events, it's possible to uniquely identify which instruction
caused a particular event.
This technique results in fewer samples being recorded than for non-marked
events, but those that are recorded are almost always precise (no skid).
Because you will get fewer than the normal number of samples, you should either
profile at a higher sampling rate than normal or make sure your application runs
long enough to give you statistically valid results. My rule of thumb is to use
a sampling rate of 100x what I would normally use for the non-marked event.
-Maynard
>
> Thank you,
> Victor
>
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next prev parent reply other threads:[~2012-03-01 19:51 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-01 17:08 Sampling instruction pointer on PPC Victor Jimenez
2012-03-01 18:00 ` David Ahern
2012-03-01 19:49 ` Maynard Johnson [this message]
[not found] ` <1330623954.4839.127.camel@oc5652146517.ibm.com>
2012-03-02 19:21 ` Victor Jimenez
2012-03-02 19:21 ` Victor Jimenez
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