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From: Anthony Liguori <anthony@codemonkey.ws>
To: Zhi Yong Wu <zwu.kernel@gmail.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] IRQ number, interrupt number, interrupt line & GPIO[in/out]
Date: Fri, 02 Mar 2012 10:01:29 -0600	[thread overview]
Message-ID: <4F50EED9.4000101@codemonkey.ws> (raw)
In-Reply-To: <CAEH94LhPcVzoqqfNwMe0MUg7dR7s74ZkthF4W2UVCKS0qys9dg@mail.gmail.com>

Hi Zhi Yong,

On 03/02/2012 06:38 AM, Zhi Yong Wu wrote:
> HI,
>
> Can anyone explain their relationship and difference among them?  It
> is very appreciated if you can make some comments. thanks.

IRQ == interrupt.

GPIO is just another name for an input or output pin on a chip which could be a 
IRQ line.

Interrupt controllers can receive interrupts from one or more devices.  Usually, 
the input pins on an interrupt controller can be numbered sequentially.  When we 
say that the first UART is on IRQ number 3, what that really means is that the 
IRQ output pin on the UART chip is connected to pin number 3 on the interrupt 
controller with a wire.

But there never is a single interrupt controller in a real system.  For 
instance, a PCI bus has it's own interrupt controller that has four input pins 
(called LNKs) that are oddly labeled A, B, C, D.

For the I440FX PCI bus, those four input pins are mapped to two IRQs which are 
then connected to the I/O APIC.

Regards,

Anthony Liguori

  parent reply	other threads:[~2012-03-02 16:01 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-03-02 12:38 [Qemu-devel] IRQ number, interrupt number, interrupt line & GPIO[in/out] Zhi Yong Wu
2012-03-02 15:12 ` 陳韋任
2012-03-03  2:10   ` Zhi Yong Wu
2012-03-03 17:12     ` Peter Maydell
2012-03-04  3:30       ` Zhi Yong Wu
2012-03-02 16:01 ` Anthony Liguori [this message]
2012-03-02 16:41   ` Peter Maydell
2012-03-03  2:19     ` Zhi Yong Wu
2012-03-03  2:06   ` Zhi Yong Wu
2012-03-11 15:04 ` Shu Ming

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