diff for duplicates of <4F5F098E.4040006@ti.com> diff --git a/a/1.txt b/N1/1.txt index 33cc7f1..fb1b0a5 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -62,8 +62,8 @@ in the OCP clock domain. The bug is going to fixed in future OMAP versions. -Reported-Tested-by: dave.long@linaro.org -[dave.long@linaro.org: Reported the oprofile time stamp issue with synctimer +Reported-Tested-by: dave.long at linaro.org +[dave.long at linaro.org: Reported the oprofile time stamp issue with synctimer and helped to test this patch] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- @@ -114,3 +114,15 @@ index c264ef7..974f7ea 100644 if (ret) { -- 1.7.4.1 + + + + + +-------------- next part -------------- +A non-text attachment was scrubbed... +Name: 0001-ARM-OMAP4-Workaround-the-OCP-synchronisation-issue-w.patch +Type: text/x-patch +Size: 3667 bytes +Desc: not available +URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20120313/d2699d79/attachment.bin> diff --git a/a/2.hdr b/a/2.hdr deleted file mode 100644 index 46d4420..0000000 --- a/a/2.hdr +++ /dev/null @@ -1,6 +0,0 @@ -Content-Type: text/x-patch; - name="0001-ARM-OMAP4-Workaround-the-OCP-synchronisation-issue-w.patch" -Content-Transfer-Encoding: 7bit -Content-Disposition: attachment; - filename*0="0001-ARM-OMAP4-Workaround-the-OCP-synchronisation-issue-w.pa"; - filename*1="tch" diff --git a/a/2.txt b/a/2.txt deleted file mode 100644 index 3c77d2f..0000000 --- a/a/2.txt +++ /dev/null @@ -1,81 +0,0 @@ ->From 2edeebbd434627d1d0a9d96f6c5bda044a68fa70 Mon Sep 17 00:00:00 2001 -From: Santosh Shilimkar <santosh.shilimkar@ti.com> -Date: Mon, 12 Mar 2012 20:34:45 +0530 -Subject: [PATCH] ARM: OMAP4: Workaround the OCP synchronisation issue with 32K synctimer. - -On OMAP4, recently a synchronisation bug is discovered by hardware -team, which leads to incorrect timer value read from 32K sync timer -IP when the IP is comming out of idle. - -The issue is due to the synchronization methodology used in the SYNCTIMER IP. -The value of the counter register in 32kHz domain is synchronized to the OCP -domain register only at count up event, and if the OCP clock is switched off, -the OCP register gets out of synch until the first count up event after the -clock is switched back -at the next falling edge of the 32kHz clock. - -Further investigation revealed that it applies to gptimer1 and watchdog timer2 -as well which may run on 32KHz. This patch fixes the issue for all the -applicable modules. - -The BUG has not made it yet to the OMAP errata list and it is applicable to -OMAP1/2/3/4/5. OMAP1/2/3 it is taken care indirectly by autodeps. - -By enabling static depedency of wakeup clockdomain with MPU, as soon as MPU -is woken up from lowpower state(idle) or whenever MPU is active, PRCM forces -the OCP clock to be running and allow the counter value to be updated properly -in the OCP clock domain. - -The bug is going to fixed in future OMAP versions. - -Reported-Tested-by: dave.long@linaro.org -[dave.long@linaro.org: Reported the oprofile time stamp issue with synctimer -and helped to test this patch] -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> ---- - arch/arm/mach-omap2/pm44xx.c | 10 ++++++++-- - 1 files changed, 8 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c -index c264ef7..974f7ea 100644 ---- a/arch/arm/mach-omap2/pm44xx.c -+++ b/arch/arm/mach-omap2/pm44xx.c -@@ -196,7 +196,7 @@ static void omap_default_idle(void) - static int __init omap4_pm_init(void) - { - int ret; -- struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm; -+ struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm, *l4wkup; - struct clockdomain *ducati_clkdm, *l3_2_clkdm, *l4_per_clkdm; - - if (!cpu_is_omap44xx()) -@@ -220,14 +220,19 @@ static int __init omap4_pm_init(void) - * MPUSS -> L4_PER/L3_* and DUCATI -> L3_* doesn't work as - * expected. The hardware recommendation is to enable static - * dependencies for these to avoid system lock ups or random crashes. -+ * The L4 wakeup depedency is added to workaround the OCP sync hardware -+ * BUG with 32K synctimer which lead to incorrect timer value read -+ * from the 32K counter. The BUG applies for GPTIMER1 and WDT2 which -+ * are part of L4 wakeup clockdomain. - */ - mpuss_clkdm = clkdm_lookup("mpuss_clkdm"); - emif_clkdm = clkdm_lookup("l3_emif_clkdm"); - l3_1_clkdm = clkdm_lookup("l3_1_clkdm"); - l3_2_clkdm = clkdm_lookup("l3_2_clkdm"); - l4_per_clkdm = clkdm_lookup("l4_per_clkdm"); -+ l4wkup = clkdm_lookup("l4_wkup_clkdm"); - ducati_clkdm = clkdm_lookup("ducati_clkdm"); -- if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) || -+ if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) || (!l4wkup) || - (!l3_2_clkdm) || (!ducati_clkdm) || (!l4_per_clkdm)) - goto err2; - -@@ -235,6 +240,7 @@ static int __init omap4_pm_init(void) - ret |= clkdm_add_wkdep(mpuss_clkdm, l3_1_clkdm); - ret |= clkdm_add_wkdep(mpuss_clkdm, l3_2_clkdm); - ret |= clkdm_add_wkdep(mpuss_clkdm, l4_per_clkdm); -+ ret |= clkdm_add_wkdep(mpuss_clkdm, l4wkup); - ret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm); - ret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm); - if (ret) { --- -1.7.4.1 diff --git a/a/content_digest b/N1/content_digest index 3ca6e4a..ec3d8ee 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,13 +1,10 @@ "ref\01331566388-2397-1-git-send-email-santosh.shilimkar@ti.com\0" "ref\087399d225f.fsf@ti.com\0" - "From\0Santosh Shilimkar <santosh.shilimkar@ti.com>\0" - "Subject\0Re: [PATCH] ARM: OMAP4: Workaround the OCP synchronisation issue with 32K synctimer.\0" + "From\0santosh.shilimkar@ti.com (Santosh Shilimkar)\0" + "Subject\0[PATCH] ARM: OMAP4: Workaround the OCP synchronisation issue with 32K synctimer.\0" "Date\0Tue, 13 Mar 2012 14:17:10 +0530\0" - "To\0Kevin Hilman <khilman@ti.com>\0" - "Cc\0linux-omap@vger.kernel.org" - linux-arm-kernel@lists.infradead.org - " dave.long@linaro.org\0" - "\01:1\0" + "To\0linux-arm-kernel@lists.infradead.org\0" + "\00:1\0" "b\0" "On Monday 12 March 2012 10:21 PM, Kevin Hilman wrote:\n" "> Santosh Shilimkar <santosh.shilimkar@ti.com> writes:\n" @@ -73,8 +70,8 @@ "\n" "The bug is going to fixed in future OMAP versions.\n" "\n" - "Reported-Tested-by: dave.long@linaro.org\n" - "[dave.long@linaro.org: Reported the oprofile time stamp issue with synctimer\n" + "Reported-Tested-by: dave.long at linaro.org\n" + "[dave.long at linaro.org: Reported the oprofile time stamp issue with synctimer\n" "and helped to test this patch]\n" "Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>\n" "---\n" @@ -124,90 +121,18 @@ " \tret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm);\n" " \tif (ret) {\n" "-- \n" - 1.7.4.1 - "\01:2\0" - "fn\00001-ARM-OMAP4-Workaround-the-OCP-synchronisation-issue-w.patch\0" - "b\0" - ">From 2edeebbd434627d1d0a9d96f6c5bda044a68fa70 Mon Sep 17 00:00:00 2001\n" - "From: Santosh Shilimkar <santosh.shilimkar@ti.com>\n" - "Date: Mon, 12 Mar 2012 20:34:45 +0530\n" - "Subject: [PATCH] ARM: OMAP4: Workaround the OCP synchronisation issue with 32K synctimer.\n" + "1.7.4.1\n" "\n" - "On OMAP4, recently a synchronisation bug is discovered by hardware\n" - "team, which leads to incorrect timer value read from 32K sync timer\n" - "IP when the IP is comming out of idle.\n" - "\n" - "The issue is due to the synchronization methodology used in the SYNCTIMER IP.\n" - "The value of the counter register in 32kHz domain is synchronized to the OCP\n" - "domain register only at count up event, and if the OCP clock is switched off,\n" - "the OCP register gets out of synch until the first count up event after the\n" - "clock is switched back -at the next falling edge of the 32kHz clock.\n" - "\n" - "Further investigation revealed that it applies to gptimer1 and watchdog timer2\n" - "as well which may run on 32KHz. This patch fixes the issue for all the\n" - "applicable modules.\n" - "\n" - "The BUG has not made it yet to the OMAP errata list and it is applicable to\n" - "OMAP1/2/3/4/5. OMAP1/2/3 it is taken care indirectly by autodeps.\n" "\n" - "By enabling static depedency of wakeup clockdomain with MPU, as soon as MPU\n" - "is woken up from lowpower state(idle) or whenever MPU is active, PRCM forces\n" - "the OCP clock to be running and allow the counter value to be updated properly\n" - "in the OCP clock domain.\n" "\n" - "The bug is going to fixed in future OMAP versions.\n" "\n" - "Reported-Tested-by: dave.long@linaro.org\n" - "[dave.long@linaro.org: Reported the oprofile time stamp issue with synctimer\n" - "and helped to test this patch]\n" - "Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>\n" - "---\n" - " arch/arm/mach-omap2/pm44xx.c | 10 ++++++++--\n" - " 1 files changed, 8 insertions(+), 2 deletions(-)\n" "\n" - "diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c\n" - "index c264ef7..974f7ea 100644\n" - "--- a/arch/arm/mach-omap2/pm44xx.c\n" - "+++ b/arch/arm/mach-omap2/pm44xx.c\n" - "@@ -196,7 +196,7 @@ static void omap_default_idle(void)\n" - " static int __init omap4_pm_init(void)\n" - " {\n" - " \tint ret;\n" - "-\tstruct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm;\n" - "+\tstruct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm, *l4wkup;\n" - " \tstruct clockdomain *ducati_clkdm, *l3_2_clkdm, *l4_per_clkdm;\n" - " \n" - " \tif (!cpu_is_omap44xx())\n" - "@@ -220,14 +220,19 @@ static int __init omap4_pm_init(void)\n" - " \t * MPUSS -> L4_PER/L3_* and DUCATI -> L3_* doesn't work as\n" - " \t * expected. The hardware recommendation is to enable static\n" - " \t * dependencies for these to avoid system lock ups or random crashes.\n" - "+\t * The L4 wakeup depedency is added to workaround the OCP sync hardware\n" - "+\t * BUG with 32K synctimer which lead to incorrect timer value read\n" - "+\t * from the 32K counter. The BUG applies for GPTIMER1 and WDT2 which\n" - "+\t * are part of L4 wakeup clockdomain.\n" - " \t */\n" - " \tmpuss_clkdm = clkdm_lookup(\"mpuss_clkdm\");\n" - " \temif_clkdm = clkdm_lookup(\"l3_emif_clkdm\");\n" - " \tl3_1_clkdm = clkdm_lookup(\"l3_1_clkdm\");\n" - " \tl3_2_clkdm = clkdm_lookup(\"l3_2_clkdm\");\n" - " \tl4_per_clkdm = clkdm_lookup(\"l4_per_clkdm\");\n" - "+\tl4wkup = clkdm_lookup(\"l4_wkup_clkdm\");\n" - " \tducati_clkdm = clkdm_lookup(\"ducati_clkdm\");\n" - "-\tif ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) ||\n" - "+\tif ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) || (!l4wkup) ||\n" - " \t\t(!l3_2_clkdm) || (!ducati_clkdm) || (!l4_per_clkdm))\n" - " \t\tgoto err2;\n" - " \n" - "@@ -235,6 +240,7 @@ static int __init omap4_pm_init(void)\n" - " \tret |= clkdm_add_wkdep(mpuss_clkdm, l3_1_clkdm);\n" - " \tret |= clkdm_add_wkdep(mpuss_clkdm, l3_2_clkdm);\n" - " \tret |= clkdm_add_wkdep(mpuss_clkdm, l4_per_clkdm);\n" - "+\tret |= clkdm_add_wkdep(mpuss_clkdm, l4wkup);\n" - " \tret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm);\n" - " \tret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm);\n" - " \tif (ret) {\n" - "-- \n" - 1.7.4.1 + "-------------- next part --------------\n" + "A non-text attachment was scrubbed...\n" + "Name: 0001-ARM-OMAP4-Workaround-the-OCP-synchronisation-issue-w.patch\n" + "Type: text/x-patch\n" + "Size: 3667 bytes\n" + "Desc: not available\n" + URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20120313/d2699d79/attachment.bin> -4de172921d3e9912b5adab563d77a8b963f409780c51213c085994788651b855 +90b950655871fb6922e61d7bb9c36b1fbec5b304ea2a5c550cfc4cd1d5a1154c
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