LWP Interrupt Handler

[Wei Huang <wei.huang2@amd.com>]

I am adding interrupt support for LWP, whose spec is available at 
http://support.amd.com/us/Processor_TechDocs/43724.pdf. Basically OS can 
specify an interrupt vector in LWP_CFG MSR; the interrupt will be 
triggered when event buffer overflows. For HVM guests, I want to 
re-inject this interrupt back into the guest VM. Here is one idea 
similar to virtualized PMU: It first registers a special interrupt 
handler (say on vector 0xf6) using set_intr_gate(). When triggered, this 
handler injects an IRQ (with vector copied from LWP_CFG) into guest VM 
via virtual local APIC. This worked from my test.

But adding a interrupt handler seems to be an overkill. Is there any 
better way to create a dummy interrupt receiver on be-behalf of guest 
VMs? I also looked into IRQ and MSI solutions inside Xen. But most of 
them assume that interrupts are from physical device (but not in this 
LWP case, where interrupt is initiated from CPU itself); so they don't 
fit very well.

Thanks,
-Wei