From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jiri Slaby Subject: Re: i915_driver_irq_handler: irq 42: nobody cared Date: Fri, 30 Mar 2012 14:11:47 +0200 Message-ID: <4F75A303.3030409@suse.cz> References: <4F717CE3.4040206@suse.cz> <4F717D80.9040207@suse.cz> <4F758400.3080907@suse.cz> <1333104359_155028@CP5-2952> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-2 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1333104359_155028@CP5-2952> Sender: linux-kernel-owner@vger.kernel.org To: Chris Wilson Cc: Jiri Slaby , Keith Packard , dri-devel@lists.freedesktop.org, LKML , daniel@ffwll.ch List-Id: dri-devel@lists.freedesktop.org On 03/30/2012 12:45 PM, Chris Wilson wrote: > On Fri, 30 Mar 2012 11:59:28 +0200, Jiri Slaby wrote: >> I don't know what to dump more, because iir is obviously zero too. What >> other sources of interrupts are on the (G33) chip? > > IIR is the master interrupt, with chained secondary interrupt statuses. > If IIR is 0, the interrupt wasn't raised by the GPU. This does not make sense, the handler does something different. Even if IIR is 0, it still takes a look at pipe stats. And this is MSI, so there can be no other source of the interrupt. (Except broken IRQ routing.) I may try to boot with MSIs off if you think it's important. thanks, -- js suse labs