From: "Andreas Färber" <afaerber@suse.de>
To: John Williams <john.williams@petalogix.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
Anthony Liguori <aliguori@us.ibm.com>,
qemu-devel@nongnu.org,
Peter Crosthwaite <peter.crosthwaite@petalogix.com>,
Paul Brook <paul@codesourcery.com>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Subject: Re: [Qemu-devel] PL353 Device model
Date: Thu, 05 Apr 2012 01:56:49 +0200 [thread overview]
Message-ID: <4F7CDFC1.3000202@suse.de> (raw)
In-Reply-To: <CACPZLaVcXTZUrq7J9opDiTK-0whiexzKkN4XhodMmJ=wFE4H3g@mail.gmail.com>
Hello John,
Am 05.04.2012 01:35, schrieb John Williams:
> On Fri, Mar 30, 2012 at 5:13 PM, Peter Crosthwaite
> <peter.crosthwaite@petalogix.com> wrote:
>
>> We currently have a somewhat hacky PL353 device model in our tree that
>> we wish to refactor and ultimately push to mainline. Before I go about
>> reworking it, I wish to discuss the architecture of this device model
>> because its non-trivial.
>
> Ping..
>
> We'd really appreciate some feedback on this to avoid the duplicated
> effort we are seeing in other areas such as SPI.
Generally speaking, the qdev busses (i.e., tree-style) are scheduled to
die out in favor of DAG-style QOM. However that's not going to happen
for 1.1 yet, so if there's a need for a new SPI bus it needs to be qdev.
As for the desired cascading here, my idea would be to make both flash
interfaces child<>s of the controller, arranging their MemoryRegions so
that (if applicable) they become subregions and can be toggled by the
controller.
My .02 AUD,
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
next prev parent reply other threads:[~2012-04-04 23:56 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-30 7:13 [Qemu-devel] PL353 Device model Peter Crosthwaite
2012-04-04 23:35 ` John Williams
2012-04-04 23:56 ` Andreas Färber [this message]
2012-04-05 0:18 ` Peter Crosthwaite
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