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Message-ID: <4F848957.6000400@mvista.com>
Date:   Tue, 10 Apr 2012 23:26:15 +0400
From:   Sergei Shtylyov <sshtylyov@mvista.com>
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To:     Leonid Yegoshin <yegoshin@mips.com>
CC:     "Steven J. Hill" <sjhill@mips.com>, linux-mips@linux-mips.org,
        ralf@linux-mips.org
Subject: Re: [PATCH] Add MIPS64R2 core support.
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Hello.

Leonid Yegoshin wrote:

>>> +config 64BIT_PHYS_ADDR
>>> +    bool "Kernel supports 64 bit physical addresses" if EXPERIMENTAL
>>> +    depends on 64BIT

>>    This option is selected on 32-bit CPUs like Alchemy, which has 
>> 36-bit physical address. It will cause a warning about unmet

> Just verified - selected Alchemy and DB1000 board and got

> # CONFIG_64BIT is not set
> CONFIG_64BIT_PHYS_ADDR=y
> CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
> CONFIG_PHYS_ADDR_T_64BIT=y

> ???

    And you didn't get a warning on "select 64BIT_PHYS_ADDR"? Strange, modern 
Kconfig should spit out one...

> I also want to say that NetLogic Microsystems web site indicates that 
> some of Alchemy CPU has only 14 bit DDR/SDRAM address, for exam - Au1550 
> (http://www.netlogicmicro.com/Products/Alchemy/Au1550.asp) but 
> arch/mips/configs/db1550_defconfig (and pb1550) choses 64BIT_PHYS_ADDR 
> too.  Seems like something wrong here.

    High address bits on Alchemies are used to address PCI/PCMCIA space, not RAM.

> - Leonid.

WBR, Sergei