diff for duplicates of <4F8DB8A9.4060506@freescale.com> diff --git a/a/1.txt b/N1/1.txt index 89bf307..9e0a757 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -3,12 +3,12 @@ On 04/17/2012 01:33 PM, Simon Glass wrote: > > On Fri, Apr 13, 2012 at 2:05 PM, Stephen Warren <swarren@wwwdotorg.org> wrote: >> On 04/13/2012 12:29 PM, Simon Glass wrote: ->>> +nand-controller@0x70008000 { +>>> +nand-controller at 0x70008000 { >>> + compatible = "nvidia,tegra20-nand"; >>> + wp-gpios = <&gpio 59 0>; /* PH3 */ >>> + nvidia,width = <8>; >>> + nvidia,timing = <26 100 20 80 20 10 12 10 70>; ->>> + nand@0 { +>>> + nand at 0 { >>> + compatible = "hynix,hy27uf4g2b", "nand-flash"; >> >> The TRM says there can be up to 8 chip selects. Don't the NAND device diff --git a/a/content_digest b/N1/content_digest index 3db9178..3ca32e9 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,14 +3,9 @@ "ref\04F8894FD.70307@wwwdotorg.org\0" "ref\0CAPnjgZ1uXbLUtMTXd5siZsKSF5m3BZGRtkGiEYhK+PQO1PbpNQ@mail.gmail.com\0" "From\0Scott Wood <scottwood@freescale.com>\0" - "Subject\0Re: [PATCH v2 4/7] tegra: fdt: Add NAND controller binding and definitions\0" + "Subject\0[U-Boot] [PATCH v2 4/7] tegra: fdt: Add NAND controller binding and definitions\0" "Date\0Tue, 17 Apr 2012 13:38:33 -0500\0" - "To\0Simon Glass <sjg@chromium.org>\0" - "Cc\0Devicetree@theia.denx.de" - Discuss <devicetree-discuss@lists.ozlabs.org> - U-Boot Mailing List <u-boot@lists.denx.de> - Jerry Van Baren <vanbaren@cideas.com> - " Tom Warren <twarren@nvidia.com>\0" + "To\0u-boot@lists.denx.de\0" "\00:1\0" "b\0" "On 04/17/2012 01:33 PM, Simon Glass wrote:\n" @@ -18,12 +13,12 @@ "> \n" "> On Fri, Apr 13, 2012 at 2:05 PM, Stephen Warren <swarren@wwwdotorg.org> wrote:\n" ">> On 04/13/2012 12:29 PM, Simon Glass wrote:\n" - ">>> +nand-controller@0x70008000 {\n" + ">>> +nand-controller at 0x70008000 {\n" ">>> + compatible = \"nvidia,tegra20-nand\";\n" ">>> + wp-gpios = <&gpio 59 0>; /* PH3 */\n" ">>> + nvidia,width = <8>;\n" ">>> + nvidia,timing = <26 100 20 80 20 10 12 10 70>;\n" - ">>> + nand@0 {\n" + ">>> + nand at 0 {\n" ">>> + compatible = \"hynix,hy27uf4g2b\", \"nand-flash\";\n" ">>\n" ">> The TRM says there can be up to 8 chip selects. Don't the NAND device\n" @@ -40,4 +35,4 @@ "\n" -Scott -970302cc23cae0e6dd1adb04a2a91f86b1e0bb1cfbd5ef47df34ca44a101c29d +2782fae2e5068413b69fd94f6a1e78a2b0c96917983df7c54d6d80fa773ca2da
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