From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexander Graf Date: Wed, 16 May 2012 09:11:44 +0000 Subject: Re: [PATCH] KVM: PPC: Not optimizing MSR_CE and MSR_DE with paravirt. Message-Id: <4FB36F50.3070801@suse.de> List-Id: References: <1337067442-26625-1-git-send-email-bharat.bhushan@freescale.com> In-Reply-To: <1337067442-26625-1-git-send-email-bharat.bhushan@freescale.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: kvm-ppc@vger.kernel.org On 05/16/2012 10:42 AM, Bhushan Bharat-R65777 wrote: > >> -----Original Message----- >> From: kvm-ppc-owner@vger.kernel.org [mailto:kvm-ppc-owner@vger.kernel.org] On >> Behalf Of Alexander Graf >> Sent: Tuesday, May 15, 2012 8:01 PM >> To: Bhushan Bharat-R65777 >> Cc: kvm-ppc@vger.kernel.org; Bhushan Bharat-R65777 >> Subject: Re: [PATCH] KVM: PPC: Not optimizing MSR_CE and MSR_DE with paravirt. >> >> On 05/15/2012 09:37 AM, Bharat Bhushan wrote: >>> From: Bhushan Bharat-R65777 >>> >>> If there is pending critical or machine check interrupt then guest >>> would like to capture it when guest enable MSR.CE and MSR_ME respectively. >>> Also as mostly MSR_CE and MSR_ME are updated with rfi/rfci/rfmii which >>> anyway traps so removing the the paravirt optimization for MSR.CE and >>> MSR.ME. >> It's only not safe for e500mc and above, right? > For e500mc and above the paravirt emulation code will not come into picture, And critical and machine check interrupt will happen only if MSR have corresponding bits set. So they are already safe. Is not it? Yup, though it might be worth documenting the fact with a few #ifdef's, in case anyone wants to run PR KVM on e500mc ever. > >> E500v2 and book3s should be >> fine. > And with this patch e500v2 will be fine? Not sure of book3s :). Well, e500v2 has edge triggered MCs, no? MSR.CE is unsafe however, as criticals are basically the same as externals. Alex