* [U-Boot] [PATCH] tegra: add SDIO1 funcmux entry for UARTA
@ 2012-05-16 16:29 Lucas Stach
2012-05-16 16:37 ` Stephen Warren
[not found] ` <5FBF8E85CA34454794F0F7ECBA79798F379AE777C5@HQMAIL04.nvidia.com>
0 siblings, 2 replies; 3+ messages in thread
From: Lucas Stach @ 2012-05-16 16:29 UTC (permalink / raw)
To: u-boot
This is based on top of:
tegra: add alternate UART1 funcmux entry
tegra: add UART1 on GPU funcmux entry
While at it sync up the pingroup enum name with the TRM.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Tom Warren <twarren@nvidia.com>
CC: Marek Vasut <marex@denx.de>
---
arch/arm/cpu/armv7/tegra2/board.c | 2 ++
arch/arm/cpu/armv7/tegra2/funcmux.c | 5 +++++
arch/arm/include/asm/arch-tegra2/funcmux.h | 1 +
arch/arm/include/asm/arch-tegra2/pinmux.h | 2 +-
4 Dateien ge?ndert, 9 Zeilen hinzugef?gt(+), 1 Zeile entfernt(-)
diff --git a/arch/arm/cpu/armv7/tegra2/board.c b/arch/arm/cpu/armv7/tegra2/board.c
index 6106ef9..923678d 100644
--- a/arch/arm/cpu/armv7/tegra2/board.c
+++ b/arch/arm/cpu/armv7/tegra2/board.c
@@ -106,6 +106,8 @@ static int uart_configs[] = {
FUNCMUX_UART1_UAA_UAB,
#elif defined(CONFIG_TEGRA2_UARTA_GPU)
FUNCMUX_UART1_GPU,
+#elif defined(CONFIG_TEGRA2_UARTA_SDIO1)
+ FUNCMUX_UART1_SDIO1,
#else
FUNCMUX_UART1_IRRX_IRTX,
#endif
diff --git a/arch/arm/cpu/armv7/tegra2/funcmux.c b/arch/arm/cpu/armv7/tegra2/funcmux.c
index c279088..1559869 100644
--- a/arch/arm/cpu/armv7/tegra2/funcmux.c
+++ b/arch/arm/cpu/armv7/tegra2/funcmux.c
@@ -50,6 +50,11 @@ int funcmux_select(enum periph_id id, int config)
pinmux_tristate_disable(PINGRP_GPU);
bad_config = 0;
break;
+ case FUNCMUX_UART1_SDIO1:
+ pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_UARTA);
+ pinmux_tristate_disable(PINGRP_SDIO1);
+ bad_config = 0;
+ break;
}
if (!bad_config) {
/*
diff --git a/arch/arm/include/asm/arch-tegra2/funcmux.h b/arch/arm/include/asm/arch-tegra2/funcmux.h
index dba2cf5..19184d1 100644
--- a/arch/arm/include/asm/arch-tegra2/funcmux.h
+++ b/arch/arm/include/asm/arch-tegra2/funcmux.h
@@ -32,6 +32,7 @@ enum {
FUNCMUX_UART1_IRRX_IRTX = 0,
FUNCMUX_UART1_UAA_UAB,
FUNCMUX_UART1_GPU,
+ FUNCMUX_UART1_SDIO1,
FUNCMUX_UART2_IRDA = 0,
FUNCMUX_UART4_GMC = 0,
diff --git a/arch/arm/include/asm/arch-tegra2/pinmux.h b/arch/arm/include/asm/arch-tegra2/pinmux.h
index 469d742..03fa7ca 100644
--- a/arch/arm/include/asm/arch-tegra2/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra2/pinmux.h
@@ -67,7 +67,7 @@ enum pmux_pingrp {
PINGRP_KBCF,
PINGRP_GMA,
PINGRP_GMC,
- PINGRP_SDMMC1,
+ PINGRP_SDIO1,
PINGRP_OWC,
/* 32: APB_MISC_PP_TRISTATE_REG_B_0 */
--
1.7.10.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH] tegra: add SDIO1 funcmux entry for UARTA
2012-05-16 16:29 [U-Boot] [PATCH] tegra: add SDIO1 funcmux entry for UARTA Lucas Stach
@ 2012-05-16 16:37 ` Stephen Warren
[not found] ` <5FBF8E85CA34454794F0F7ECBA79798F379AE777C5@HQMAIL04.nvidia.com>
1 sibling, 0 replies; 3+ messages in thread
From: Stephen Warren @ 2012-05-16 16:37 UTC (permalink / raw)
To: u-boot
On 05/16/2012 10:29 AM, Lucas Stach wrote:
> This is based on top of:
> tegra: add alternate UART1 funcmux entry
> tegra: add UART1 on GPU funcmux entry
>
> While at it sync up the pingroup enum name with the TRM.
>
> Signed-off-by: Lucas Stach <dev@lynxeye.de>
> CC: Stephen Warren <swarren@wwwdotorg.org>
> CC: Tom Warren <twarren@nvidia.com>
> CC: Marek Vasut <marex@denx.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
^ permalink raw reply [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH] tegra: add SDIO1 funcmux entry for UARTA
[not found] ` <5FBF8E85CA34454794F0F7ECBA79798F379AE777C5@HQMAIL04.nvidia.com>
@ 2012-05-16 18:09 ` Lucas Stach
0 siblings, 0 replies; 3+ messages in thread
From: Lucas Stach @ 2012-05-16 18:09 UTC (permalink / raw)
To: u-boot
Am Mittwoch, den 16.05.2012, 10:59 -0700 schrieb Tom Warren:
> Lucas,
>
> > -----Original Message-----
> > From: Lucas Stach [mailto:dev at lynxeye.de]
> > Sent: Wednesday, May 16, 2012 9:29 AM
> > To: u-boot at lists.denx.de
> > Cc: Stephen Warren; Tom Warren; Marek Vasut
> > Subject: [PATCH] tegra: add SDIO1 funcmux entry for UARTA
> >
> > This is based on top of:
> > tegra: add alternate UART1 funcmux entry
> > tegra: add UART1 on GPU funcmux entry
> >
> > While at it sync up the pingroup enum name with the TRM.
> >
> > Signed-off-by: Lucas Stach <dev@lynxeye.de>
> > CC: Stephen Warren <swarren@wwwdotorg.org>
> > CC: Tom Warren <twarren@nvidia.com>
> > CC: Marek Vasut <marex@denx.de>
> > ---
> > arch/arm/cpu/armv7/tegra2/board.c | 2 ++
> > arch/arm/cpu/armv7/tegra2/funcmux.c | 5 +++++
> > arch/arm/include/asm/arch-tegra2/funcmux.h | 1 +
> > arch/arm/include/asm/arch-tegra2/pinmux.h | 2 +-
> > 4 Dateien ge?ndert, 9 Zeilen hinzugef?gt(+), 1 Zeile entfernt(-)
> >
> > diff --git a/arch/arm/cpu/armv7/tegra2/board.c
> > b/arch/arm/cpu/armv7/tegra2/board.c
> > index 6106ef9..923678d 100644
> > --- a/arch/arm/cpu/armv7/tegra2/board.c
> > +++ b/arch/arm/cpu/armv7/tegra2/board.c
> > @@ -106,6 +106,8 @@ static int uart_configs[] = {
> > FUNCMUX_UART1_UAA_UAB,
> > #elif defined(CONFIG_TEGRA2_UARTA_GPU)
> > FUNCMUX_UART1_GPU,
> > +#elif defined(CONFIG_TEGRA2_UARTA_SDIO1)
> > + FUNCMUX_UART1_SDIO1,
> > #else
> > FUNCMUX_UART1_IRRX_IRTX,
> > #endif
> > diff --git a/arch/arm/cpu/armv7/tegra2/funcmux.c
> > b/arch/arm/cpu/armv7/tegra2/funcmux.c
> > index c279088..1559869 100644
> > --- a/arch/arm/cpu/armv7/tegra2/funcmux.c
> > +++ b/arch/arm/cpu/armv7/tegra2/funcmux.c
> > @@ -50,6 +50,11 @@ int funcmux_select(enum periph_id id, int config)
> > pinmux_tristate_disable(PINGRP_GPU);
> > bad_config = 0;
> > break;
> > + case FUNCMUX_UART1_SDIO1:
> > + pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_UARTA);
> > + pinmux_tristate_disable(PINGRP_SDIO1);
> > + bad_config = 0;
> > + break;
> > }
> > if (!bad_config) {
> > /*
> > diff --git a/arch/arm/include/asm/arch-tegra2/funcmux.h
> > b/arch/arm/include/asm/arch-tegra2/funcmux.h
> > index dba2cf5..19184d1 100644
> > --- a/arch/arm/include/asm/arch-tegra2/funcmux.h
> > +++ b/arch/arm/include/asm/arch-tegra2/funcmux.h
> > @@ -32,6 +32,7 @@ enum {
> > FUNCMUX_UART1_IRRX_IRTX = 0,
> > FUNCMUX_UART1_UAA_UAB,
> > FUNCMUX_UART1_GPU,
> > + FUNCMUX_UART1_SDIO1,
> > FUNCMUX_UART2_IRDA = 0,
> > FUNCMUX_UART4_GMC = 0,
> >
> > diff --git a/arch/arm/include/asm/arch-tegra2/pinmux.h
> > b/arch/arm/include/asm/arch-tegra2/pinmux.h
> > index 469d742..03fa7ca 100644
> > --- a/arch/arm/include/asm/arch-tegra2/pinmux.h
> > +++ b/arch/arm/include/asm/arch-tegra2/pinmux.h
> > @@ -67,7 +67,7 @@ enum pmux_pingrp {
> > PINGRP_KBCF,
> > PINGRP_GMA,
> > PINGRP_GMC,
> > - PINGRP_SDMMC1,
> > + PINGRP_SDIO1,
>
> This breaks Stephen's PAZ00 support (commit 2996e2dcc in u-boot-tegra/master, 'tegra2: Add support for Compal Paz00'):
>
> Configuring for paz00 board...
> paz00.c: In function 'pin_mux_mmc':
> paz00.c:52: error: 'PINGRP_SDMMC1' undeclared (first use in this function)
> paz00.c:52: error: (Each undeclared identifier is reported only once
> paz00.c:52: error: for each function it appears in.)
> make[1]: *** [paz00.o] Error 1
> make: *** [board/compal/paz00/libpaz00.o] Error 2
> arm-none-linux-gnueabi-size: './u-boot': No such file
>
> Please fix, and be sure to test all patches with MAKEALL -s tegra2, and (at least) MAKEALL -c armv7 if they touch common code.
Oh, sorry. Thanks for the heads-up.
As the churn of the sync is bigger than I thought, I will split up this
patch. Updated patches follow in a minute.
Thanks,
Lucas
>
> Thanks,
>
> Tom
> > PINGRP_OWC,
> >
> > /* 32: APB_MISC_PP_TRISTATE_REG_B_0 */
> > --
> > 1.7.10.1
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2012-05-16 18:09 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-05-16 16:29 [U-Boot] [PATCH] tegra: add SDIO1 funcmux entry for UARTA Lucas Stach
2012-05-16 16:37 ` Stephen Warren
[not found] ` <5FBF8E85CA34454794F0F7ECBA79798F379AE777C5@HQMAIL04.nvidia.com>
2012-05-16 18:09 ` Lucas Stach
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.