From: "Andreas Färber" <afaerber@suse.de>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: patches@linaro.org, qemu-devel@nongnu.org,
Paul Brook <paul@codesourcery.com>
Subject: Re: [Qemu-devel] [PATCH 2/9] hw/arm_gic: Remove the special casing of NCPU for the NVIC
Date: Fri, 18 May 2012 15:01:15 +0200 [thread overview]
Message-ID: <4FB6481B.1070603@suse.de> (raw)
In-Reply-To: <1335978732-32559-3-git-send-email-peter.maydell@linaro.org>
Am 02.05.2012 19:12, schrieb Peter Maydell:
> Drop the special casing of NCPU=1 for the NVIC. This slightly
> increases the amount of memory used by its state structure,
> but removes some ifdeffery and means we can safely move the
> GIC state into a common subclass structure.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> hw/arm_gic.c | 23 +++--------------------
> hw/armv7m_nvic.c | 5 ++---
> 2 files changed, 5 insertions(+), 23 deletions(-)
>
> diff --git a/hw/arm_gic.c b/hw/arm_gic.c
> index 17b2eba..2d8ceb8 100644
> --- a/hw/arm_gic.c
> +++ b/hw/arm_gic.c
[...]
> @@ -131,11 +123,9 @@ typedef struct gic_state
>
> static inline int gic_get_current_cpu(gic_state *s)
> {
> -#if NCPU > 1
> if (s->num_cpu > 1) {
> return cpu_single_env->cpu_index;
> }
> -#endif
> return 0;
> }
Why special-case the num_cpu == 1 case? Is cpu_single_env not available
in all cases?
Otherwise looks good.
/-F
--
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GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
next prev parent reply other threads:[~2012-05-18 13:01 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-02 17:12 [Qemu-devel] [PATCH 0/9] disentangle NVIC from ARM GIC Peter Maydell
2012-05-02 17:12 ` [Qemu-devel] [PATCH 1/9] hw/arm_gic: Remove NVIC ifdefs from gic_state struct Peter Maydell
2012-05-18 12:55 ` Andreas Färber
2012-05-02 17:12 ` [Qemu-devel] [PATCH 2/9] hw/arm_gic: Remove the special casing of NCPU for the NVIC Peter Maydell
2012-05-18 13:01 ` Andreas Färber [this message]
2012-05-18 13:21 ` Peter Maydell
2012-05-02 17:12 ` [Qemu-devel] [PATCH 3/9] hw/arm_gic: Move NVIC specific reset to armv7m_nvic_reset Peter Maydell
2012-05-02 17:12 ` [Qemu-devel] [PATCH 4/9] hw/armv7m_nvic: Use MemoryRegions for NVIC specific registers Peter Maydell
2012-05-02 17:12 ` [Qemu-devel] [PATCH 5/9] hw/arm_gic: Add qdev property for GIC revision Peter Maydell
2012-05-02 17:12 ` [Qemu-devel] [PATCH 6/9] hw/arm_gic: Make CPU target registers RAZ/WI on uniprocessor Peter Maydell
2012-05-02 17:12 ` [Qemu-devel] [PATCH 7/9] hw/arm_gic.c: Make NVIC interrupt numbering a runtime setting Peter Maydell
2012-05-02 17:12 ` [Qemu-devel] [PATCH 8/9] hw/arm_gic: Move CPU interface memory region setup into arm_gic_init Peter Maydell
2012-05-02 17:12 ` [Qemu-devel] [PATCH 9/9] hw/armv7m_nvic: Make the NVIC a freestanding class Peter Maydell
2012-05-18 12:49 ` [Qemu-devel] [PATCH 0/9] disentangle NVIC from ARM GIC Peter Maydell
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