From: Alex Shi <alex.shi@intel.com>
To: Andrew Lutomirski <luto@mit.edu>
Cc: Peter Zijlstra <peterz@infradead.org>,
Jan Beulich <JBeulich@suse.com>,
borislav.petkov@amd.com, arnd@arndb.de, akinobu.mita@gmail.com,
eric.dumazet@gmail.com, fweisbec@gmail.com, rostedt@goodmis.org,
hughd@google.com, jeremy@goop.org, len.brown@intel.com,
tony.luck@intel.com, yongjie.ren@intel.com,
kamezawa.hiroyu@jp.fujitsu.com, seto.hidetoshi@jp.fujitsu.com,
penberg@kernel.org, yinghai@kernel.org, tglx@linutronix.de,
akpm@linux-foundation.org, ak@linux.intel.com, avi@redhat.com,
dhowells@redhat.com, mingo@redhat.com, riel@redhat.com,
cpw@sgi.com, steiner@sgi.com, linux-kernel@vger.kernel.org,
viro@zeniv.linux.org.uk, hpa@zytor.com
Subject: Re: [PATCH v7 8/8] x86/tlb: just do tlb flush on one of siblings of SMT
Date: Thu, 24 May 2012 13:12:46 +0800 [thread overview]
Message-ID: <4FBDC34E.5090905@intel.com> (raw)
In-Reply-To: <CAObL_7GEzHYV9RbinPmK5D3DkZLiV0Wbz6j8x-Agbi21BM_OgA@mail.gmail.com>
On 05/24/2012 09:46 AM, Andrew Lutomirski wrote:
> On Wed, May 23, 2012 at 10:15 AM, Peter Zijlstra <peterz@infradead.org> wrote:
>> On Wed, 2012-05-23 at 19:09 +0200, Peter Zijlstra wrote:
>>>> There is no comment or anything else indicating that this is
>>>> suitable for dual-thread CPUs only - when there are more than
>>>> 2 threads per core, the intended effect won't be achieved.
>>>
>>> Why would that be? Won't higher thread count still share the same
>>> resources just more so?
>>
>> Ah, I see, you're saying his code is buggy for >2 threads. Agreed.
>>
>
> An evil knob to statically choose which SMT sibling gets the interrupt
> would be nice. Then my compute-intensive thread could be (mostly)
> unaffected by the other thread on a different core that calls munmap
> frequently.
How to know we are in such situation? :)
>
> --Andy
next prev parent reply other threads:[~2012-05-24 5:14 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-23 14:15 [PATCH v7 0/8] x86 tlb optimisations Alex Shi
2012-05-23 14:15 ` [PATCH v7 1/8] x86/tlb_info: get last level TLB entry number of CPU Alex Shi
2012-05-23 14:15 ` [PATCH v7 2/8] x86/flush_tlb: try flush_tlb_single one by one in flush_tlb_range Alex Shi
2012-05-23 14:51 ` Jan Beulich
2012-05-24 6:41 ` Alex Shi
2012-05-24 8:12 ` Jan Beulich
2012-05-24 8:55 ` Alex Shi
2012-05-24 9:44 ` Jan Beulich
2012-05-24 14:36 ` Alex Shi
2012-05-25 2:43 ` Alex Shi
2012-05-23 14:15 ` [PATCH v7 3/8] x86/tlb: fall back to flush all when meet a THP large page Alex Shi
2012-05-23 14:15 ` [PATCH v7 4/8] x86/tlb: add tlb_flushall_shift for specific CPU Alex Shi
2012-05-23 14:15 ` [PATCH v7 5/8] x86/tlb: enable tlb flush range support for generic mmu and x86 Alex Shi
2012-05-23 14:15 ` [PATCH v7 6/8] x86/tlb: add tlb_flushall_shift knob into debugfs Alex Shi
2012-05-23 14:15 ` [PATCH v7 7/8] x86/tlb: replace INVALIDATE_TLB_VECTOR by CALL_FUNCTION_VECTOR Alex Shi
2012-05-23 14:15 ` [PATCH v7 8/8] x86/tlb: just do tlb flush on one of siblings of SMT Alex Shi
2012-05-23 15:05 ` Jan Beulich
2012-05-23 17:09 ` Peter Zijlstra
2012-05-23 17:15 ` Peter Zijlstra
2012-05-24 1:46 ` Andrew Lutomirski
2012-05-24 5:12 ` Alex Shi [this message]
2012-05-24 6:04 ` Borislav Petkov
2012-05-24 7:40 ` Peter Zijlstra
2012-05-24 13:19 ` Andrew Lutomirski
2012-05-24 13:23 ` Peter Zijlstra
2012-05-24 13:39 ` Arjan van de Ven
2012-05-24 13:54 ` Alex Shi
2012-05-24 14:18 ` Arjan van de Ven
2012-05-24 14:32 ` Alex Shi
2012-05-24 15:03 ` H. Peter Anvin
2012-05-25 0:24 ` Alex Shi
2012-05-24 16:08 ` Arjan van de Ven
2012-05-25 0:28 ` Alex Shi
2012-05-25 0:46 ` Arjan van de Ven
2012-05-24 8:32 ` Alex Shi
2012-05-24 8:42 ` Peter Zijlstra
2012-05-24 8:48 ` Alex Shi
2012-05-24 11:35 ` Rusty Russell
2012-05-24 14:03 ` Alex Shi
2012-05-24 9:27 ` Alex Shi
2012-05-24 9:42 ` Peter Zijlstra
2012-05-24 9:46 ` Jan Beulich
2012-05-24 14:06 ` Alex Shi
2012-05-24 8:43 ` Peter Zijlstra
2012-05-24 8:48 ` Jan Beulich
2012-05-24 9:02 ` Alex Shi
2012-05-24 9:45 ` Jan Beulich
2012-05-24 15:04 ` H. Peter Anvin
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