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Date: Fri, 08 Jun 2012 15:28:46 +0200
From: =?ISO-8859-1?Q?Andreas_F=E4rber?= <afaerber@suse.de>
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Subject: Re: [Qemu-devel] [PATCH v3 08/16] target-or32: Add translation
	routines
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To: Jia Liu <proljc@gmail.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>, qemu-devel@nongnu.org

Am 08.06.2012 14:56, schrieb Max Filippov:
> On Fri, Jun 8, 2012 at 4:00 AM, Jia Liu <proljc@gmail.com> wrote:
>=20
>>        {
>>            TCGv_i64 t0 =3D tcg_temp_new();
>>            TCGv_i64 t1 =3D tcg_temp_new();
>>            TCGv_i64 t2 =3D tcg_temp_new();
>>            tcg_gen_mul_tl(t0, cpu_R[ra], cpu_R[rb]);
>=20
> t0 should be _tl according to that.

You may find these patches helpful for detecting such mismatches:
http://patchwork.ozlabs.org/patch/130511/
http://patchwork.ozlabs.org/patch/130513/
http://patchwork.ozlabs.org/patch/130514/
http://patchwork.ozlabs.org/patch/130512/

Unfortunately there was no agreement at the time on how to proceed with
that feature...

Andreas

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