From: "Andreas Färber" <afaerber@suse.de>
To: "Maciej W. Rozycki" <macro@codesourcery.com>
Cc: Meador Inge <meadori@codesourcery.com>,
qemu-devel@nongnu.org, Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [PATCH] MIPS/user: Fix reset CPU state initialization
Date: Fri, 08 Jun 2012 19:22:08 +0200 [thread overview]
Message-ID: <4FD234C0.1050409@suse.de> (raw)
In-Reply-To: <alpine.DEB.1.10.1206081718180.23962@tp.orcam.me.uk>
Am 08.06.2012 18:20, schrieb Maciej W. Rozycki:
> On Fri, 8 Jun 2012, Meador Inge wrote:
>
>>> The problem was seen with the 24Kf MIPS32r2 processor in user emulation.
>>> The new approach prevents system and user emulation from diverging -- all
>>> the hflags state is initialized in one place now.
>>
>> I submitted a patch to fix this issue and the FCR0 issue a few months back [1].
>> Andreas reviewed it, but the patch never got committed.
>>
>> [1] http://patchwork.ozlabs.org/patch/144353/
I fear that patch would need to be rebased now, since my cross-target
QOM refactoring was applied for v1.1.
> That's unfortunate -- hopefully this can be finally resolved now.
The best solution would be if someone stepped up as target-mips
maintainer as long as Aurélien is busy, to review and queue such
patches. m68k, mips and sh4 keep falling through the cracks currently...
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
next prev parent reply other threads:[~2012-06-08 17:22 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-08 1:04 [Qemu-devel] [PATCH] MIPS/user: Fix reset CPU state initialization Maciej W. Rozycki
2012-06-08 13:37 ` Meador Inge
2012-06-08 16:20 ` Maciej W. Rozycki
2012-06-08 17:22 ` Andreas Färber [this message]
2012-06-08 18:51 ` Maciej W. Rozycki
2012-09-07 23:58 ` Aurelien Jarno
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