diff for duplicates of <4FD849CF.4030009@firmworks.com> diff --git a/a/content_digest b/N1/content_digest index 989d9c9..ba89d53 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -9,19 +9,19 @@ "ref\020120613064519.GD31001@avionic-0098.mockup.avionic-design.de\0" "ref\04FD84133.4060401@firmworks.com\0" "ref\020120613075232.GA6139@avionic-0098.mockup.avionic-design.de\0" - "From\0Mitch Bradley <wmb@firmworks.com>\0" + "ref\020120613075232.GA6139-RM9K5IK7kjIQXX3q8xo1gnVAuStQJXxyR5q1nwbD4aMs9pC9oP6+/A@public.gmane.org\0" + "From\0Mitch Bradley <wmb-D5eQfiDGL7eakBO8gow8eQ@public.gmane.org>\0" "Subject\0Re: [PATCH v2 07/10] ARM: tegra: pcie: Add device tree support\0" "Date\0Tue, 12 Jun 2012 22:05:35 -1000\0" - "To\0Thierry Reding <thierry.reding@avionic-design.de>\0" - "Cc\0Stephen Warren <swarren@wwwdotorg.org>" - Russell King <linux@arm.linux.org.uk> - linux-pci@vger.kernel.org - devicetree-discuss@lists.ozlabs.org - Rob Herring <rob.herring@calxeda.com> - Jesse Barnes <jbarnes@virtuousgeek.org> - Colin Cross <ccross@android.com> - linux-tegra@vger.kernel.org - " linux-arm-kernel@lists.infradead.org\0" + "To\0Thierry Reding <thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org>\0" + "Cc\0Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>" + linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org + Jesse Barnes <jbarnes-Y1mF5jBUw70BENJcbMCuUQ@public.gmane.org> + Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org> + Colin Cross <ccross-z5hGa2qSFaRBDgjK7y7TUQ@public.gmane.org> + linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0" "\00:1\0" "b\0" "On 6/12/2012 9:52 PM, Thierry Reding wrote:\n" @@ -270,4 +270,4 @@ ">>> Thierry\n" >> -b237d0b69534d1f594b00d122753abd71345bfecbb5f6d972ef622ba5f76cd2e +a8dbd46817cdc1b3856d5129ef68c4817a8a4008447eed42e330dc2a193fab2a
diff --git a/a/1.txt b/N2/1.txt index afa86e6..b4c75fc 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -30,12 +30,12 @@ On 6/12/2012 9:52 PM, Thierry Reding wrote: >>>>>> #address-cells =<1>; >>>>>> #size-cells =<1>; >>>>>> ->>>>>> port@80000000 { +>>>>>> port at 80000000 { >>>>>> reg =<0x80000000 0x00001000>; >>>>>> status = "disabled"; >>>>>> }; >>>>>> ->>>>>> port@80001000 { +>>>>>> port at 80001000 { >>>>>> reg =<0x80001000 0x00001000>; >>>>>> status = "disabled"; >>>>>> }; @@ -50,7 +50,7 @@ On 6/12/2012 9:52 PM, Thierry Reding wrote: >>>>> >>>>> As a general concept, this kind of design seems OK to me. >>>>> ->>>>> The "port" child nodes I think should be named "pci@..." given Mitch's +>>>>> The "port" child nodes I think should be named "pci at ..." given Mitch's >>>>> comments, I think. >>>>> >>>>> The port nodes probably need two entries in reg, given the following in @@ -79,12 +79,12 @@ On 6/12/2012 9:52 PM, Thierry Reding wrote: >>>>> PCIe controller's register space based on the ID using code roughly like >>>>> what I quoted above: >>>>> ->>>>> pci@0 { +>>>>> pci at 0 { >>>>> reg =<0>; >>>>> status = "disabled"; >>>>> }; >>>>> ->>>>> pci@1 { +>>>>> pci at 1 { >>>>> reg =<0>; >>>>> status = "disabled"; >>>>> }; @@ -159,7 +159,7 @@ On 6/12/2012 9:52 PM, Thierry Reding wrote: > #address-cells =<1>; > #size-cells =<1>; > -> pci@80000000 { +> pci at 80000000 { > reg =<0x80000000 0x00001000>; > status = "disabled"; > @@ -184,7 +184,7 @@ third cells will typically be 0. The PCI binding has details. > nvidia,num-lanes =<2>; > }; > -> pci@80001000 { +> pci at 80001000 { > reg =<0x80001000 0x00001000>; > status = "disabled"; > @@ -209,7 +209,7 @@ third cells will typically be 0. The PCI binding has details. >> #address-cells =<1>; >> #size-cells =<1>; >> ->> pci@80000000 { +>> pci at 80000000 { >> reg =<0x80000000 0x00001000>; >> ctrl-offset =<0x0>; >> status = "disabled"; @@ -219,7 +219,7 @@ third cells will typically be 0. The PCI binding has details. >> to linear spaces above */>; >> }; >> ->> pci@80001000 { +>> pci at 80001000 { >> reg =<0x80001000 0x00001000>; >> ctrl-offset =<0x8>; >> status = "disabled"; diff --git a/a/content_digest b/N2/content_digest index 989d9c9..b362d08 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -9,19 +9,10 @@ "ref\020120613064519.GD31001@avionic-0098.mockup.avionic-design.de\0" "ref\04FD84133.4060401@firmworks.com\0" "ref\020120613075232.GA6139@avionic-0098.mockup.avionic-design.de\0" - "From\0Mitch Bradley <wmb@firmworks.com>\0" - "Subject\0Re: [PATCH v2 07/10] ARM: tegra: pcie: Add device tree support\0" + "From\0wmb@firmworks.com (Mitch Bradley)\0" + "Subject\0[PATCH v2 07/10] ARM: tegra: pcie: Add device tree support\0" "Date\0Tue, 12 Jun 2012 22:05:35 -1000\0" - "To\0Thierry Reding <thierry.reding@avionic-design.de>\0" - "Cc\0Stephen Warren <swarren@wwwdotorg.org>" - Russell King <linux@arm.linux.org.uk> - linux-pci@vger.kernel.org - devicetree-discuss@lists.ozlabs.org - Rob Herring <rob.herring@calxeda.com> - Jesse Barnes <jbarnes@virtuousgeek.org> - Colin Cross <ccross@android.com> - linux-tegra@vger.kernel.org - " linux-arm-kernel@lists.infradead.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 6/12/2012 9:52 PM, Thierry Reding wrote:\n" @@ -56,12 +47,12 @@ ">>>>>> \t\t#address-cells =<1>;\n" ">>>>>> \t\t#size-cells =<1>;\n" ">>>>>>\n" - ">>>>>> \t\tport@80000000 {\n" + ">>>>>> \t\tport at 80000000 {\n" ">>>>>> \t\t\treg =<0x80000000 0x00001000>;\n" ">>>>>> \t\t\tstatus = \"disabled\";\n" ">>>>>> \t\t};\n" ">>>>>>\n" - ">>>>>> \t\tport@80001000 {\n" + ">>>>>> \t\tport at 80001000 {\n" ">>>>>> \t\t\treg =<0x80001000 0x00001000>;\n" ">>>>>> \t\t\tstatus = \"disabled\";\n" ">>>>>> \t\t};\n" @@ -76,7 +67,7 @@ ">>>>>\n" ">>>>> As a general concept, this kind of design seems OK to me.\n" ">>>>>\n" - ">>>>> The \"port\" child nodes I think should be named \"pci@...\" given Mitch's\n" + ">>>>> The \"port\" child nodes I think should be named \"pci at ...\" given Mitch's\n" ">>>>> comments, I think.\n" ">>>>>\n" ">>>>> The port nodes probably need two entries in reg, given the following in\n" @@ -105,12 +96,12 @@ ">>>>> PCIe controller's register space based on the ID using code roughly like\n" ">>>>> what I quoted above:\n" ">>>>>\n" - ">>>>> \tpci@0 {\n" + ">>>>> \tpci at 0 {\n" ">>>>> \t\treg =<0>;\n" ">>>>> \t\tstatus = \"disabled\";\n" ">>>>> \t};\n" ">>>>>\n" - ">>>>> \tpci@1 {\n" + ">>>>> \tpci at 1 {\n" ">>>>> \t\treg =<0>;\n" ">>>>> \t\tstatus = \"disabled\";\n" ">>>>> \t};\n" @@ -185,7 +176,7 @@ "> \t\t#address-cells =<1>;\n" "> \t\t#size-cells =<1>;\n" ">\n" - "> \t\tpci@80000000 {\n" + "> \t\tpci at 80000000 {\n" "> \t\t\treg =<0x80000000 0x00001000>;\n" "> \t\t\tstatus = \"disabled\";\n" ">\n" @@ -210,7 +201,7 @@ "> \t\t\tnvidia,num-lanes =<2>;\n" "> \t\t};\n" ">\n" - "> \t\tpci@80001000 {\n" + "> \t\tpci at 80001000 {\n" "> \t\t\treg =<0x80001000 0x00001000>;\n" "> \t\t\tstatus = \"disabled\";\n" ">\n" @@ -235,7 +226,7 @@ ">> #address-cells =<1>;\n" ">> #size-cells =<1>;\n" ">>\n" - ">> pci@80000000 {\n" + ">> pci at 80000000 {\n" ">> reg =<0x80000000 0x00001000>;\n" ">> ctrl-offset =<0x0>;\n" ">> status = \"disabled\";\n" @@ -245,7 +236,7 @@ ">> to linear spaces above */>;\n" ">> };\n" ">>\n" - ">> pci@80001000 {\n" + ">> pci at 80001000 {\n" ">> reg =<0x80001000 0x00001000>;\n" ">> ctrl-offset =<0x8>;\n" ">> status = \"disabled\";\n" @@ -270,4 +261,4 @@ ">>> Thierry\n" >> -b237d0b69534d1f594b00d122753abd71345bfecbb5f6d972ef622ba5f76cd2e +33c2d43ecb9e8d4819260e50b5e6aef1f2ef87724913abce2aba02d66956c85c
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