Re: [Qemu-devel] q35 chipset support

[Anthony Liguori <anthony@codemonkey.ws>]

On 06/18/2012 09:35 AM, Michael S. Tsirkin wrote:
> On Mon, Jun 18, 2012 at 09:16:24AM -0500, Anthony Liguori wrote:
>> On 06/17/2012 03:25 AM, Michael S. Tsirkin wrote:
>>> On Fri, Jun 15, 2012 at 12:58:33PM -0500, Anthony Liguori wrote:
>>>> The Q35 is much more sophisticated.  The PCI-e complex itself can
>>>> present interesting topologies and the legacy PCI bus sits within
>>>> the PCI-e complex.
>>>
>>> Ah, so we can mix in PCI as well? Cool. How does
>>> such a mixed topology look?
>>
>> It does, but I'm having a really hard time deciphering the spec
>> here.  Here's what it says:
>>
>> "The ICH9 PCI interface provides a 33 MHz, Revision 2.3 implementation. The ICH9
>> integrates a PCI arbiter that supports up to four external PCI bus
>> masters in addition to the internal ICH9 requests. This allows for
>> combinations of up to four PCI down devices and PCI slots."
>>
>> So my interpretation of this is that it provides the ability to
>> expose legacy PCI slots.  I can't get a reading though on how this
>> shows up in the PCI topology though.
>>
>> It sounds like it would show up as a separate PCI domain.
>>
>> Regards,
>>
>> Anthony Liguori
>
> Actually I found a box with ICH9
> http://fpaste.org/VREA/
> or see attached.
>
> It looks like there's at least one PCI bridge attached to
> the host bridge.

Right, and it appears to be a 2.3 bridge (the express capability isn't set).

I guess that's the mobile PCI expansion slots as it has a flash card reader in it.

Regards,

Anthony Liguori

>
>>>