[U-Boot] [PATCH] EXYNOS: PINMUX: modify the gpio function value for mmc

[Jaehoon Chung <jh80.chung@samsung.com>]

Hi Rajeshwari,

I just considered the EVT1 board.
I will resend the patch for this.

Best Regards,
Jaehoon Chung

On 06/20/2012 02:55 PM, Rajeshwari Birje wrote:

> Hi Jaehoon Chung,
> 
> Had few comments...
> 
> Is this changes for EVT1 board?
> As per the EVT1 Manual I have it is:
> MMC0: Correct as per your changes.
> MMC1: Bank C2 - 4 bit:  func - 0x2
> MMC2: Bank C3 - 4 bit:  func - 0x2, You have made it 8 bit. (EVT0 the
> manual I have it says func 0x2)
> MMC3 not there.
> 
> On Wed, Jun 20, 2012 at 10:31 AM, Jaehoon Chung <jh80.chung@samsung.com> wrote:
>> In Exynos5, if used 8-bit busmode, set the gpio configuration to
>> GPIO_FUNC(0x2).
>>
>> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
>> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
>> ---
>>  arch/arm/cpu/armv7/exynos/pinmux.c |   20 +++++++++++---------
>>  1 files changed, 11 insertions(+), 9 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
>> index d2b7d2c..356cf8d 100644
>> --- a/arch/arm/cpu/armv7/exynos/pinmux.c
>> +++ b/arch/arm/cpu/armv7/exynos/pinmux.c
>> @@ -66,12 +66,14 @@ static int exynos5_mmc_config(int peripheral, int flags)
>>        struct exynos5_gpio_part1 *gpio1 =
>>                (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
>>        struct s5p_gpio_bank *bank, *bank_ext;
>> -       int i;
>> +       int i, gpio_func, gpio_start;
>>
>>        switch (peripheral) {
>>        case PERIPH_ID_SDMMC0:
>>                bank = &gpio1->c0;
>>                bank_ext = &gpio1->c1;
>> +               gpio_func = GPIO_FUNC(0x2);
>> +               gpio_start = 0;
>>                break;
>>        case PERIPH_ID_SDMMC1:
>>                bank = &gpio1->c1;
>> @@ -80,6 +82,8 @@ static int exynos5_mmc_config(int peripheral, int flags)
>>        case PERIPH_ID_SDMMC2:
>>                bank = &gpio1->c2;
>>                bank_ext = &gpio1->c3;
>> +               gpio_func = GPIO_FUNC(0x3);
>> +               gpio_start = 3;
>>                break;
>>        case PERIPH_ID_SDMMC3:
>>                bank = &gpio1->c3;
>> @@ -92,18 +96,16 @@ static int exynos5_mmc_config(int peripheral, int flags)
>>                return -1;
>>        }
>>        if (flags & PINMUX_FLAG_8BIT_MODE) {
>> -               for (i = 3; i <= 6; i++) {
>> -                       s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
>> +               for (i = gpio_start; i <= gpio_start + 3; i++) {
>> +                       s5p_gpio_cfg_pin(bank_ext, i, gpio_func);
>>                        s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_UP);
>>                        s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
>>                }
>>        }
>> -       for (i = 0; i < 2; i++) {
>> -               s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
>> -               s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
>> -               s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
>> -       }
>> -       for (i = 3; i <= 6; i++) {
>> +
>> +       for (i = 0; i <= 6; i++) {
>> +               if (i == 2)
>> +             continue;
>>                s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
>>                s5p_gpio_set_pull(bank, i, GPIO_PULL_UP);
> --- Do we have to pull up for CMD, and CLK gpio ?
> -- CD line not set?
>>                s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
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