From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: Other PCI devices to mark mark as read-only for dom0 Date: Fri, 22 Jun 2012 10:04:24 +0100 Message-ID: <4FE43518.9070106@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: "xen-devel@lists.xen.org" , Jan Beulich , Keir Fraser , Wei Wang , Andre Przywara , Christoph Egger , "xiantao.zhang@intel.com" , Eddie Dong List-Id: xen-devel@lists.xenproject.org Following Jan's infrastructure to mark certain PCI devices as read only, I think it wise to now consider what other PCI devices should really be read only to dom0. My preliminary thoughts include: * PCI serial devices which Xen is configured to use * Chipset devices (AMD IOMMU covered by previous patch) * Cpu information Are there any others I have overlooked, or reasons that dom0 should be able to write to these areas? On a related note, should there be a mechanism for dom0 to determine which PCI configuration areas are read only to itself? -- Andrew Cooper - Dom0 Kernel Engineer, Citrix XenServer T: +44 (0)1223 225 900, http://www.citrix.com