Re: [Qemu-devel] MMIO coalescing of the i82378 bridge

[Jan Kiszka <jan.kiszka@web.de>]

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On 2012-06-23 14:46, Andreas Färber wrote:
> Hi Jan,
> 
> Am 23.06.2012 11:28, schrieb Jan Kiszka:
>> just stumbled over the memory_region_set_coalescing in pci_i82378_init:
>> What ISA devices are affected by this? It looks a bit strange to me as
>> the MMIO requests are apparently mapped on PIO requests, and we don't
>> have PIO coalescing on x86. Depending on the target device on PREP, this
>> may have some unexpected side effects. Or is only framebuffer memory
>> addressed this way?
> 
> I only remember touching that line to rebase it onto either Memory API
> or QOM. The i82378 is the sole PCI-ISA bridge so all ISA devices will be
> affected by it, which is pretty much everything except VGA iirc.
> The upcoming pc87312(?) Super I/O also would be attached to it,
> replacing some of the bogus I/O in the current "prep" machine.
> 
> I'm not familiar with what this option affects. What unexpected side
> effects would you expect? :)

Simple example: You write to the PIT to start/stop a timer, but this
transaction is now delayed until the next coalesced buffer flush.

IOW, there surely exit write operations that must not be reordered /wrt
to the VCPU execution flow. I would recommend to drop coalescing, even
more if its benefit is not clear.

Jan


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