diff for duplicates of <4FEA95A8.3080505@samsung.com> diff --git a/a/1.1.hdr b/a/1.1.hdr deleted file mode 100644 index 094af2c..0000000 --- a/a/1.1.hdr +++ /dev/null @@ -1,2 +0,0 @@ -Content-Type: text/plain; charset=ISO-8859-1; format=flowed -Content-Transfer-Encoding: 7bit diff --git a/a/1.2.bin b/a/1.2.bin deleted file mode 100644 index e5579d6..0000000 --- a/a/1.2.bin +++ /dev/null @@ -1,131 +0,0 @@ -<html> - <head> - <meta content="text/html; charset=ISO-8859-1" - http-equiv="Content-Type"> - </head> - <body bgcolor="#FFFFFF" text="#000000"> - Hi,<br> - <br> - On 06/27/2012 08:57 AM, Boojin Kim wrote: - <blockquote - cite="mid:006d01cd53f7$6877ed90$3967c8b0$%25kim@samsung.com" - type="cite"> - <pre wrap="">Joonyoung Shim wrote: - -</pre> - <blockquote type="cite"> - <pre wrap="">I don't understand this. Do you mean that BL1 codes do it? -I also wonder how enable L2 cache at the exynos5. -</pre> - </blockquote> - <pre wrap="">Yes, the latency configuration of L2 cache is located on IROM or BL1 code.</pre> - </blockquote> - <br> - How does kernel know it? Also, IROM and BL1 is blackbox to me<br> - <br> - <blockquote - cite="mid:006d01cd53f7$6877ed90$3967c8b0$%25kim@samsung.com" - type="cite"> - <pre wrap=""> -It can remove the overhead about cache reset and cache flush. -And, Kernel enables L2 cache.</pre> - </blockquote> - <br> - I cannot find codes to enable L2 cache for exynos5 in the kernel.<br> - Please let me know it.<br> - <br> - Thanks.<br> - <br> - <blockquote - cite="mid:006d01cd53f7$6877ed90$3967c8b0$%25kim@samsung.com" - type="cite"> - <pre wrap=""> -Thanks. -</pre> - <blockquote type="cite"> - <pre wrap=""> -</pre> - <blockquote type="cite"> - <pre wrap="">no longer need that in the kernel. It helps to reduce -booting time (no need cache disable and cache enable). - -Signed-off-by: Boojin Kim <a class="moz-txt-link-rfc2396E" href="mailto:boojin.kim@samsung.com"><boojin.kim@samsung.com></a> -Signed-off-by: Kukjin Kim <a class="moz-txt-link-rfc2396E" href="mailto:kgene.kim@samsung.com"><kgene.kim@samsung.com></a> ---- -쟞rch/arm/mach-exynos/common.c | 25 ------------------------- - 1 files changed, 0 insertions(+), 25 deletions(-) - -diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c -index 742edd3..0ec1a91 100644 ---- a/arch/arm/mach-exynos/common.c -+++ b/arch/arm/mach-exynos/common.c -@@ -712,31 +712,6 @@ static int __init exynos4_l2x0_cache_init(void) -쟢arly_initcall(exynos4_l2x0_cache_init); - #endif - --static int __init exynos5_l2_cache_init(void) --{ -- unsigned int val; -- -- if (!soc_is_exynos5250()) -- return 0; -- -- asm volatile("mrc p15, 0, %0, c1, c0, 0\n" -- "bic %0, %0, #(1 << 2)\n" /* cache disable */ -- "mcr p15, 0, %0, c1, c0, 0\n" -- "mrc p15, 1, %0, c9, c0, 2\n" -- : "=r"(val)); -- -- val |= (1 << 9) | (1 << 5) | (2 << 6) | (2 << 0); -- -- asm volatile("mcr p15, 1, %0, c9, c0, 2\n" : : "r"(val)); -- asm volatile("mrc p15, 0, %0, c1, c0, 0\n" -- "orr %0, %0, #(1 << 2)\n" /* cache enable */ -- "mcr p15, 0, %0, c1, c0, 0\n" -- : : "r"(val)); -- -- return 0; --} --early_initcall(exynos5_l2_cache_init); -- -쟳tatic int __init exynos_init(void) - { - 쟰rintk(KERN_INFO "EXYNOS: Initializing architecture\n"); --- -1.7.1 - - -_______________________________________________ -linux-arm-kernel mailing list -<a class="moz-txt-link-abbreviated" href="mailto:linux-arm-kernel@lists.infradead.org">linux-arm-kernel@lists.infradead.org</a> -<a class="moz-txt-link-freetext" href="http://lists.infradead.org/mailman/listinfo/linux-arm-kernel">http://lists.infradead.org/mailman/listinfo/linux-arm-kernel</a> -</pre> - </blockquote> - <pre wrap=""> - - --- -- Joonyoung Shim - -_______________________________________________ -linux-arm-kernel mailing list -<a class="moz-txt-link-abbreviated" href="mailto:linux-arm-kernel@lists.infradead.org">linux-arm-kernel@lists.infradead.org</a> -<a class="moz-txt-link-freetext" href="http://lists.infradead.org/mailman/listinfo/linux-arm-kernel">http://lists.infradead.org/mailman/listinfo/linux-arm-kernel</a> -</pre> - </blockquote> - <pre wrap=""> - - -</pre> - <br> - <fieldset class="mimeAttachmentHeader"></fieldset> - <br> - <pre wrap="">_______________________________________________ -linux-arm-kernel mailing list -<a class="moz-txt-link-abbreviated" href="mailto:linux-arm-kernel@lists.infradead.org">linux-arm-kernel@lists.infradead.org</a> -<a class="moz-txt-link-freetext" href="http://lists.infradead.org/mailman/listinfo/linux-arm-kernel">http://lists.infradead.org/mailman/listinfo/linux-arm-kernel</a> -</pre> - </blockquote> - <br> - </body> -</html> diff --git a/a/1.2.hdr b/a/1.2.hdr deleted file mode 100644 index e403a18..0000000 --- a/a/1.2.hdr +++ /dev/null @@ -1,2 +0,0 @@ -Content-Type: text/html; charset=ISO-8859-1 -Content-Transfer-Encoding: 7bit diff --git a/a/1.1.txt b/N1/1.txt similarity index 89% rename from a/1.1.txt rename to N1/1.txt index 6097919..bfa6002 100644 --- a/a/1.1.txt +++ b/N1/1.txt @@ -69,7 +69,7 @@ Thanks. >>> >>> _______________________________________________ >>> linux-arm-kernel mailing list ->>> linux-arm-kernel@lists.infradead.org +>>> linux-arm-kernel at lists.infradead.org >>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel >> >> @@ -78,7 +78,7 @@ Thanks. >> >> _______________________________________________ >> linux-arm-kernel mailing list ->> linux-arm-kernel@lists.infradead.org +>> linux-arm-kernel at lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > > @@ -86,5 +86,9 @@ Thanks. > > _______________________________________________ > linux-arm-kernel mailing list -> linux-arm-kernel@lists.infradead.org +> linux-arm-kernel at lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel + +-------------- next part -------------- +An HTML attachment was scrubbed... +URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20120627/66ca79fe/attachment-0001.html> diff --git a/a/2.hdr b/a/2.hdr deleted file mode 100644 index 4b86001..0000000 --- a/a/2.hdr +++ /dev/null @@ -1,4 +0,0 @@ -Content-Type: text/plain; charset="us-ascii" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Content-Disposition: inline diff --git a/a/2.txt b/a/2.txt deleted file mode 100644 index 8133cf0..0000000 --- a/a/2.txt +++ /dev/null @@ -1,4 +0,0 @@ -_______________________________________________ -linux-arm-kernel mailing list -linux-arm-kernel@lists.infradead.org -http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/a/content_digest b/N1/content_digest index d49f543..1ceb1e0 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,16 +1,11 @@ "ref\0038301cd4f47$8202b420$86081c60$%kim@samsung.com\0" "ref\0CAPLVkLsgi3ST622ZhRusJz5OHV6MJYP7SNkj2Mh-QPos1AWyhQ@mail.gmail.com\0" "ref\0006d01cd53f7$6877ed90$3967c8b0$%kim@samsung.com\0" - "From\0Joonyoung Shim <jy0922.shim@samsung.com>\0" - "Subject\0Re: [PATCH] ARM: EXYNOS: Remove the L2 cache latency setting for EXYNOS5\0" + "From\0jy0922.shim@samsung.com (Joonyoung Shim)\0" + "Subject\0[PATCH] ARM: EXYNOS: Remove the L2 cache latency setting for EXYNOS5\0" "Date\0Wed, 27 Jun 2012 14:10:00 +0900\0" - "To\0Boojin Kim <boojin.kim@samsung.com>\0" - "Cc\0linux-arm-kernel@lists.infradead.org" - 'Russell King' <rmk+kernel@arm.linux.org.uk> - 'Kukjin Kim' <kgene.kim@samsung.com> - 'Joonyoung Shim' <dofmind@gmail.com> - " linux-samsung-soc@vger.kernel.org\0" - "\02:1.1\0" + "To\0linux-arm-kernel@lists.infradead.org\0" + "\00:1\0" "b\0" "Hi,\n" "\n" @@ -83,7 +78,7 @@ ">>>\n" ">>> _______________________________________________\n" ">>> linux-arm-kernel mailing list\n" - ">>> linux-arm-kernel@lists.infradead.org\n" + ">>> linux-arm-kernel at lists.infradead.org\n" ">>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\n" ">>\n" ">>\n" @@ -92,7 +87,7 @@ ">>\n" ">> _______________________________________________\n" ">> linux-arm-kernel mailing list\n" - ">> linux-arm-kernel@lists.infradead.org\n" + ">> linux-arm-kernel at lists.infradead.org\n" ">> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\n" ">\n" ">\n" @@ -100,146 +95,11 @@ ">\n" "> _______________________________________________\n" "> linux-arm-kernel mailing list\n" - "> linux-arm-kernel@lists.infradead.org\n" - > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel - "\02:1.2\0" - "b\0" - "<html>\n" - " <head>\n" - " <meta content=\"text/html; charset=ISO-8859-1\"\n" - " http-equiv=\"Content-Type\">\n" - " </head>\n" - " <body bgcolor=\"#FFFFFF\" text=\"#000000\">\n" - " Hi,<br>\n" - " <br>\n" - " On 06/27/2012 08:57 AM, Boojin Kim wrote:\n" - " <blockquote\n" - " cite=\"mid:006d01cd53f7$6877ed90$3967c8b0$%25kim@samsung.com\"\n" - " type=\"cite\">\n" - " <pre wrap=\"\">Joonyoung Shim wrote:\n" - "\n" - "</pre>\n" - " <blockquote type=\"cite\">\n" - " <pre wrap=\"\">I don't understand this. Do you mean that BL1 codes do it?\n" - "I also wonder how enable L2 cache at the exynos5.\n" - "</pre>\n" - " </blockquote>\n" - " <pre wrap=\"\">Yes, the latency configuration of L2 cache is located on IROM or BL1 code.</pre>\n" - " </blockquote>\n" - " <br>\n" - " How does kernel know it? Also, IROM and BL1 is blackbox to me<br>\n" - " <br>\n" - " <blockquote\n" - " cite=\"mid:006d01cd53f7$6877ed90$3967c8b0$%25kim@samsung.com\"\n" - " type=\"cite\">\n" - " <pre wrap=\"\">\n" - "It can remove the overhead about cache reset and cache flush.\n" - "And, Kernel enables L2 cache.</pre>\n" - " </blockquote>\n" - " <br>\n" - " I cannot find codes to enable L2 cache for exynos5 in the kernel.<br>\n" - " Please let me know it.<br>\n" - " <br>\n" - " Thanks.<br>\n" - " <br>\n" - " <blockquote\n" - " cite=\"mid:006d01cd53f7$6877ed90$3967c8b0$%25kim@samsung.com\"\n" - " type=\"cite\">\n" - " <pre wrap=\"\">\n" - "Thanks.\n" - "</pre>\n" - " <blockquote type=\"cite\">\n" - " <pre wrap=\"\">\n" - "</pre>\n" - " <blockquote type=\"cite\">\n" - " <pre wrap=\"\">no longer need that in the kernel. It helps to reduce\n" - "booting time (no need cache disable and cache enable).\n" - "\n" - "Signed-off-by: Boojin Kim <a class=\"moz-txt-link-rfc2396E\" href=\"mailto:boojin.kim@samsung.com\"><boojin.kim@samsung.com></a>\n" - "Signed-off-by: Kukjin Kim <a class=\"moz-txt-link-rfc2396E\" href=\"mailto:kgene.kim@samsung.com\"><kgene.kim@samsung.com></a>\n" - "---\n" - "쟞rch/arm/mach-exynos/common.c | 25 -------------------------\n" - " 1 files changed, 0 insertions(+), 25 deletions(-)\n" - "\n" - "diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c\n" - "index 742edd3..0ec1a91 100644\n" - "--- a/arch/arm/mach-exynos/common.c\n" - "+++ b/arch/arm/mach-exynos/common.c\n" - "@@ -712,31 +712,6 @@ static int __init exynos4_l2x0_cache_init(void)\n" - "쟢arly_initcall(exynos4_l2x0_cache_init);\n" - " #endif\n" - "\n" - "-static int __init exynos5_l2_cache_init(void)\n" - "-{\n" - "- unsigned int val;\n" - "-\n" - "- if (!soc_is_exynos5250())\n" - "- return 0;\n" - "-\n" - "- asm volatile(\"mrc p15, 0, %0, c1, c0, 0\\n\"\n" - "- \"bic %0, %0, #(1 << 2)\\n\" /* cache disable */\n" - "- \"mcr p15, 0, %0, c1, c0, 0\\n\"\n" - "- \"mrc p15, 1, %0, c9, c0, 2\\n\"\n" - "- : \"=r\"(val));\n" - "-\n" - "- val |= (1 << 9) | (1 << 5) | (2 << 6) | (2 << 0);\n" - "-\n" - "- asm volatile(\"mcr p15, 1, %0, c9, c0, 2\\n\" : : \"r\"(val));\n" - "- asm volatile(\"mrc p15, 0, %0, c1, c0, 0\\n\"\n" - "- \"orr %0, %0, #(1 << 2)\\n\" /* cache enable */\n" - "- \"mcr p15, 0, %0, c1, c0, 0\\n\"\n" - "- : : \"r\"(val));\n" - "-\n" - "- return 0;\n" - "-}\n" - "-early_initcall(exynos5_l2_cache_init);\n" - "-\n" - "쟳tatic int __init exynos_init(void)\n" - " {\n" - " 쟰rintk(KERN_INFO \"EXYNOS: Initializing architecture\\n\");\n" - "--\n" - "1.7.1\n" - "\n" + "> linux-arm-kernel at lists.infradead.org\n" + "> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\n" "\n" - "_______________________________________________\n" - "linux-arm-kernel mailing list\n" - "<a class=\"moz-txt-link-abbreviated\" href=\"mailto:linux-arm-kernel@lists.infradead.org\">linux-arm-kernel@lists.infradead.org</a>\n" - "<a class=\"moz-txt-link-freetext\" href=\"http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\">http://lists.infradead.org/mailman/listinfo/linux-arm-kernel</a>\n" - "</pre>\n" - " </blockquote>\n" - " <pre wrap=\"\">\n" - "\n" - "\n" - "--\n" - "- Joonyoung Shim\n" - "\n" - "_______________________________________________\n" - "linux-arm-kernel mailing list\n" - "<a class=\"moz-txt-link-abbreviated\" href=\"mailto:linux-arm-kernel@lists.infradead.org\">linux-arm-kernel@lists.infradead.org</a>\n" - "<a class=\"moz-txt-link-freetext\" href=\"http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\">http://lists.infradead.org/mailman/listinfo/linux-arm-kernel</a>\n" - "</pre>\n" - " </blockquote>\n" - " <pre wrap=\"\">\n" - "\n" - "\n" - "</pre>\n" - " <br>\n" - " <fieldset class=\"mimeAttachmentHeader\"></fieldset>\n" - " <br>\n" - " <pre wrap=\"\">_______________________________________________\n" - "linux-arm-kernel mailing list\n" - "<a class=\"moz-txt-link-abbreviated\" href=\"mailto:linux-arm-kernel@lists.infradead.org\">linux-arm-kernel@lists.infradead.org</a>\n" - "<a class=\"moz-txt-link-freetext\" href=\"http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\">http://lists.infradead.org/mailman/listinfo/linux-arm-kernel</a>\n" - "</pre>\n" - " </blockquote>\n" - " <br>\n" - " </body>\n" - "</html>\n" - "\01:2\0" - "b\0" - "_______________________________________________\n" - "linux-arm-kernel mailing list\n" - "linux-arm-kernel@lists.infradead.org\n" - http://lists.infradead.org/mailman/listinfo/linux-arm-kernel + "-------------- next part --------------\n" + "An HTML attachment was scrubbed...\n" + URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20120627/66ca79fe/attachment-0001.html> -42f78ea56eba546e55d1007a4a3c66e62906cbc0389da3bb93162ce397cd1377 +a8fa5e835ab5fb31d87dd8d58ba35c4d413b3208b8cc4fa21150d91bf3f3c98b
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