From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Date: Mon, 02 Jul 2012 17:43:20 +0000 Subject: Re: [PATCH v11 8/8] PPC: Don't use hardcoded opcode for ePAPR hcall invocation Message-Id: <4FF1DDB8.6010504@freescale.com> List-Id: References: <1340395568-29620-1-git-send-email-stuart.yoder@freescale.com> <4FF1D618.5030207@freescale.com> <440F1FF6-267A-452C-9665-274F684A1C93@suse.de> <4FF1D75D.4050507@freescale.com> <8694AAE5-6312-4074-BEA3-2953101890D7@suse.de> <4FF1D988.3040602@freescale.com> <4FF1DBB0.1080909@freescale.com> In-Reply-To: <4FF1DBB0.1080909@freescale.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Timur Tabi Cc: Alexander Graf , Stuart Yoder , kvm-ppc@vger.kernel.org, kvm@vger.kernel.org On 07/02/2012 12:34 PM, Timur Tabi wrote: > Scott Wood wrote: > >> Hmm. The comment says, "XER, CTR, and LR are currently listed as >> clobbers because it's uncertain whether they will be clobbered." Maybe >> it dates back to when the ABI was still being discussed? Timur, do you >> recall? > > Nope, sorry. I'm sure we discussed this and looked at the code. My guess > is that we weren't certain what the compiler was going to do at the time. I'm not sure how the compiler is involved here -- we're just telling it what our asm code (and the asm code in the hypervisor) will do. > I'm still a little confused. Which inline assembly code is clobbering LR? > Are you talking about the "BL" instruction, which wasn't there before? Yes, I didn't realize that LR had been in the clobber list before that. -Scott From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Subject: Re: [PATCH v11 8/8] PPC: Don't use hardcoded opcode for ePAPR hcall invocation Date: Mon, 2 Jul 2012 12:43:20 -0500 Message-ID: <4FF1DDB8.6010504@freescale.com> References: <1340395568-29620-1-git-send-email-stuart.yoder@freescale.com> <4FF1D618.5030207@freescale.com> <440F1FF6-267A-452C-9665-274F684A1C93@suse.de> <4FF1D75D.4050507@freescale.com> <8694AAE5-6312-4074-BEA3-2953101890D7@suse.de> <4FF1D988.3040602@freescale.com> <4FF1DBB0.1080909@freescale.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Cc: Alexander Graf , Stuart Yoder , , To: Timur Tabi Return-path: In-Reply-To: <4FF1DBB0.1080909@freescale.com> Sender: kvm-ppc-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On 07/02/2012 12:34 PM, Timur Tabi wrote: > Scott Wood wrote: > >> Hmm. The comment says, "XER, CTR, and LR are currently listed as >> clobbers because it's uncertain whether they will be clobbered." Maybe >> it dates back to when the ABI was still being discussed? Timur, do you >> recall? > > Nope, sorry. I'm sure we discussed this and looked at the code. My guess > is that we weren't certain what the compiler was going to do at the time. I'm not sure how the compiler is involved here -- we're just telling it what our asm code (and the asm code in the hypervisor) will do. > I'm still a little confused. Which inline assembly code is clobbering LR? > Are you talking about the "BL" instruction, which wasn't there before? Yes, I didn't realize that LR had been in the clobber list before that. -Scott