From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jon Hunter Subject: Re: [PATCH v5 3/3] ARM: OMAP2+: onenand: prepare for gpmc driver migration Date: Tue, 3 Jul 2012 10:10:03 -0500 Message-ID: <4FF30B4B.8060203@ti.com> References: <0a4c9edc1328f7789491e2acf5138364e08bf2cb.1340778003.git.afzal@ti.com> <20120627145844.GL3483@atomide.com> <20120628123207.GG19842@atomide.com> <4FEC89B9.3090404@ti.com> <20120702063651.GO4202@atomide.com> <4FF1DA5F.9000409@ti.com> Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Return-path: Received: from bear.ext.ti.com ([192.94.94.41]:55856 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754992Ab2GCPKI (ORCPT ); Tue, 3 Jul 2012 11:10:08 -0400 In-Reply-To: Sender: linux-omap-owner@vger.kernel.org List-Id: linux-omap@vger.kernel.org To: "Mohammed, Afzal" Cc: Tony Lindgren , "paul@pwsan.com" , "linux-omap@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" On 07/02/2012 11:35 PM, Mohammed, Afzal wrote: > Hi Jon, > > On Mon, Jul 02, 2012 at 22:59:03, Hunter, Jon wrote: >> On 07/02/2012 04:43 AM, Mohammed, Afzal wrote: > >>> Not sure whether you are fine with fixing up this patch with added diff >>> >>> Assuming inferences so far is not wrong, right now this patch with the added diff >>> would be perfectly fine. >>> >>> Problem would happen when we are at a stage to do gpmc reset using hwmod [seems >>> miles to go before I sleep {or read gpmc hwmod reset} ;)]. If bootloader left >>> onenand configured in sync mode, to switch onenand to async mode, first configuring >>> gpmc to sync mode would be required & for that we need frequency information >>> from onenand and to get that information from onenand, gpmc has to be configured >>> for sync mode and to configure gpmc to sync mode .... >> >> You are concerned about hwmod performing a reset of the gpmc during >> boot? We should be able to use the HWMOD_INIT_NO_RESET flag to prevent >> this. Would that work? > > Yes that will work in the short term, the reason I am trying to avoid no > reset flag in the long term is to prevent this board support being broken, > please refer Paul's requirement [1] in accepting gpmc hwmod patch Ok, thanks for the reminder. So we have 2 options here ... 1. Use the HWMOD_INIT_NO_RESET for now and your updated version of this patch 2. See if there is a gpio available to control the OneNAND reset on the n900. Do you agree? Any other options? Cheers Jon From mboxrd@z Thu Jan 1 00:00:00 1970 From: jon-hunter@ti.com (Jon Hunter) Date: Tue, 3 Jul 2012 10:10:03 -0500 Subject: [PATCH v5 3/3] ARM: OMAP2+: onenand: prepare for gpmc driver migration In-Reply-To: References: <0a4c9edc1328f7789491e2acf5138364e08bf2cb.1340778003.git.afzal@ti.com> <20120627145844.GL3483@atomide.com> <20120628123207.GG19842@atomide.com> <4FEC89B9.3090404@ti.com> <20120702063651.GO4202@atomide.com> <4FF1DA5F.9000409@ti.com> Message-ID: <4FF30B4B.8060203@ti.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 07/02/2012 11:35 PM, Mohammed, Afzal wrote: > Hi Jon, > > On Mon, Jul 02, 2012 at 22:59:03, Hunter, Jon wrote: >> On 07/02/2012 04:43 AM, Mohammed, Afzal wrote: > >>> Not sure whether you are fine with fixing up this patch with added diff >>> >>> Assuming inferences so far is not wrong, right now this patch with the added diff >>> would be perfectly fine. >>> >>> Problem would happen when we are at a stage to do gpmc reset using hwmod [seems >>> miles to go before I sleep {or read gpmc hwmod reset} ;)]. If bootloader left >>> onenand configured in sync mode, to switch onenand to async mode, first configuring >>> gpmc to sync mode would be required & for that we need frequency information >>> from onenand and to get that information from onenand, gpmc has to be configured >>> for sync mode and to configure gpmc to sync mode .... >> >> You are concerned about hwmod performing a reset of the gpmc during >> boot? We should be able to use the HWMOD_INIT_NO_RESET flag to prevent >> this. Would that work? > > Yes that will work in the short term, the reason I am trying to avoid no > reset flag in the long term is to prevent this board support being broken, > please refer Paul's requirement [1] in accepting gpmc hwmod patch Ok, thanks for the reminder. So we have 2 options here ... 1. Use the HWMOD_INIT_NO_RESET for now and your updated version of this patch 2. See if there is a gpio available to control the OneNAND reset on the n900. Do you agree? Any other options? Cheers Jon