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From: Scott Wood <scottwood@freescale.com>
To: Kumar Gala <galak@kernel.crashing.org>
Cc: Varun Sethi <Varun.Sethi@freescale.com>, linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 1/3] powerpc/mpic: finish supporting timer group B on Freescale chips
Date: Mon, 9 Jul 2012 12:42:16 -0500	[thread overview]
Message-ID: <4FFB17F8.3060507@freescale.com> (raw)
In-Reply-To: <66B03D29-D273-4E1A-8CAB-F7A9367587A5@kernel.crashing.org>

On 07/09/2012 12:36 PM, Kumar Gala wrote:
> 
> On Jul 9, 2012, at 11:43 AM, Scott Wood wrote:
> 
>> On 07/09/2012 09:12 AM, Kumar Gala wrote:
>>>
>>> On Jul 9, 2012, at 3:45 AM, Varun Sethi wrote:
>>>
>>>> Previously, these interrupts would be mapped, but the offset
>>>> calculation was broken, and only the first group was initialized.
>>>>
>>>> Signed-off-by: Scott Wood <scottwood@freescale.com>
>>>> ---
>>>> arch/powerpc/include/asm/mpic.h |    5 +++
>>>> arch/powerpc/sysdev/mpic.c      |   58 ++++++++++++++++++++++++++++-----------
>>>> 2 files changed, 47 insertions(+), 16 deletions(-)
>>
>> Varun, where's your signoff?
>>
>>>> +	if (mpic->flags & MPIC_FSL) {
>>>> +		u32 brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
>>>> +				      MPIC_FSL_BRR1);
>>>> +		u32 version = brr1 & MPIC_FSL_BRR1_VER;
>>>> +
>>>> +		/*
>>>> +		 * Timer group B is present at the latest in MPIC 3.1 (e.g.
>>>> +		 * mpc8536).  It is not present in MPIC 2.0 (e.g. mpc8544).
>>>> +		 * I don't know about the status of intermediate versions (or
>>>> +		 * whether they even exist).
>>>> +		 */
>>>> +		if (version >= 0x0301)
>>>> +			num_timers = 8;
>>>> +	}
>>>> +
>>>
>>> Why don't we do this just via the device tree?
>>
>> Then we'd have to change existing device trees (again), and in general
>> there's no reason to put it in the device tree if it's discoverable via
>> hardware version registers.
> 
> Except for the whole AMP issue ;).  One reason we did add the 2nd bank of timers was for AMP.

What's the AMP issue?  This is just for determining whether the timer
IVPRs exist and can be requested.  The interrupt should not be requested
if the timer node isn't in the tree, unless the caller has other
knowledge that it is valid (such as a KVM directly assigned interrupt).

> Also, we have this in the .dts already:
> 
> $ git grep pq3-mpic-timer-B.dtsi arch/powerpc/boot/dts/
> arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi:/include/ "pq3-mpic-timer-B.dtsi"
> arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi:/include/ "pq3-mpic-timer-B.dtsi"
> arch/powerpc/boot/dts/fsl/p1010si-post.dtsi:/include/ "pq3-mpic-timer-B.dtsi"
> arch/powerpc/boot/dts/fsl/p1020si-post.dtsi:/include/ "pq3-mpic-timer-B.dtsi"
> arch/powerpc/boot/dts/fsl/p1021si-post.dtsi:/include/ "pq3-mpic-timer-B.dtsi"
> arch/powerpc/boot/dts/fsl/p1022si-post.dtsi:/include/ "pq3-mpic-timer-B.dtsi"
> arch/powerpc/boot/dts/fsl/p1023si-post.dtsi:/include/ "pq3-mpic-timer-B.dtsi"
> arch/powerpc/boot/dts/fsl/p2020si-post.dtsi:/include/ "pq3-mpic-timer-B.dtsi"

Right, but what if we remove that node to keep the host from accessing
those timers, and still want to assign it to a KVM guest?  I thought you
were asking for a property on the MPIC node.

-Scott

  reply	other threads:[~2012-07-09 17:42 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-09  8:45 [PATCH 1/3] powerpc/mpic: finish supporting timer group B on Freescale chips Varun Sethi
2012-07-09 14:12 ` Kumar Gala
2012-07-09 16:43   ` Scott Wood
2012-07-09 17:36     ` Kumar Gala
2012-07-09 17:42       ` Scott Wood [this message]
2012-07-31 14:09         ` Sethi Varun-B16395
     [not found] ` <A0409C87-73AF-4D08-8AAC-676B4C6DC602@kernel.crashing.org>
     [not found]   ` <C5ECD7A89D1DC44195F34B25E172658D14C328@039-SN2MPN1-013.039d.mgd.msft.net>
2012-07-31 14:23     ` Kumar Gala
  -- strict thread matches above, loose matches on Subject: below --
2012-06-03  7:41 Varun Sethi

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