diff for duplicates of <4FFECC4E.4070001@googlemail.com> diff --git a/a/1.txt b/N1/1.txt index 230f448..3d03d8f 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -13,7 +13,7 @@ extra information is required to access the resource. But I agree, expecially wrt more-than-one-bit clk-gate (see below). >> + /* SATA clock gate with different parent clock */ ->> + cg_sata: clockgate at 3 { +>> + cg_sata: clockgate@3 { >> + reg =<3 0>; /* register bit 3, normal polarity */ >> + clocks =<&sata_clk>; >> + }; diff --git a/a/content_digest b/N1/content_digest index 2a88a2c..0121c83 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,9 +1,16 @@ "ref\04FFE7979.4060000@googlemail.com\0" "ref\04FFEBF8A.1020700@gmail.com\0" - "From\0sebastian.hesselbarth@googlemail.com (Sebastian Hesselbarh)\0" - "Subject\0[RESEND PATCH 1/1] clk: add DT support for clock gating control\0" + "From\0Sebastian Hesselbarh <sebastian.hesselbarth@googlemail.com>\0" + "Subject\0Re: [RESEND PATCH 1/1] clk: add DT support for clock gating control\0" "Date\0Thu, 12 Jul 2012 15:08:30 +0200\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Rob Herring <robherring2@gmail.com>\0" + "Cc\0Grant Likely <grant.likely@secretlab.ca>" + Rob Landley <rob@landley.net> + Mike Turquette <mturquette@ti.com> + devicetree-discuss@lists.ozlabs.org + linux-doc@vger.kernel.org + linux-kernel@vger.kernel.org + " linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 07/12/2012 02:14 PM, Rob Herring wrote:\n" @@ -21,7 +28,7 @@ "expecially wrt more-than-one-bit clk-gate (see below).\n" "\n" ">> + /* SATA clock gate with different parent clock */\n" - ">> + cg_sata: clockgate at 3 {\n" + ">> + cg_sata: clockgate@3 {\n" ">> + reg =<3 0>; /* register bit 3, normal polarity */\n" ">> + clocks =<&sata_clk>;\n" ">> + };\n" @@ -53,4 +60,4 @@ "\n" Sebastian -ae7eee58cfdcc2c94f2032d612f39dbbf84ac6674823891d53fd7c0ae97a79f9 +c98c6d2173033889df8aebd3ede57af90f1cca482c670083ea8bf4266b5e6546
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