From: "Edgecombe, Rick P" <rick.p.edgecombe@intel.com>
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Subject: Re: [PATCH v2 2/8] x86/mm: Don't do a TLB flush if changing a PTE that isn't marked present
Date: Mon, 27 Nov 2023 22:21:07 +0000 [thread overview]
Message-ID: <4a64d05c80c9c490d291af881a86c3d853160060.camel@intel.com> (raw)
In-Reply-To: <20231121212016.1154303-3-mhklinux@outlook.com>
On Tue, 2023-11-21 at 13:20 -0800, mhkelley58@gmail.com wrote:
> --- a/arch/x86/mm/pat/set_memory.c
> +++ b/arch/x86/mm/pat/set_memory.c
> @@ -1636,7 +1636,10 @@ static int __change_page_attr(struct cpa_data
> *cpa, int primary)
> */
> if (pte_val(old_pte) != pte_val(new_pte)) {
> set_pte_atomic(kpte, new_pte);
> - cpa->flags |= CPA_FLUSHTLB;
> +
> + /* If old_pte isn't present, it's not in the
> TLB */
> + if (pte_present(old_pte))
> + cpa->flags |= CPA_FLUSHTLB;
> }
> cpa->numpages = 1;
> return 0;
>
Makes sense to me. The PMD case can be handled similarly in
__should_split_large_page().
I also think it should be more robust in regards to the cache flushing
changes.
If callers did:
set_memory_np()
set_memory_uc()
set_memory_p()
Then the cache flush would be missed. I don't think anyone is, but we
shouldn't introduce hidden things like that. Maybe fix it like this:
diff --git a/arch/x86/mm/pat/set_memory.c
b/arch/x86/mm/pat/set_memory.c
index f519e5ca543b..28ff53a4447a 100644
--- a/arch/x86/mm/pat/set_memory.c
+++ b/arch/x86/mm/pat/set_memory.c
@@ -1856,11 +1856,6 @@ static int change_page_attr_set_clr(unsigned
long *addr, int numpages,
ret = __change_page_attr_set_clr(&cpa, 1);
- /*
- * Check whether we really changed something:
- */
- if (!(cpa.flags & CPA_FLUSHTLB))
- goto out;
/*
* No need to flush, when we did not set any of the caching
@@ -1868,6 +1863,12 @@ static int change_page_attr_set_clr(unsigned
long *addr, int numpages,
*/
cache = !!pgprot2cachemode(mask_set);
+ /*
+ * Check whether we really changed something:
+ */
+ if (!(cpa.flags & CPA_FLUSHTLB) && !cache)
+ goto out;
+
/*
* On error; flush everything to be sure.
*/
Hmm, might want to maintain the "On error; flush everything to be sure"
logic in the NP->P case as well.
next prev parent reply other threads:[~2023-11-27 22:21 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-21 21:20 [PATCH v2 0/8] x86/coco: Mark CoCo VM pages not present when changing encrypted state mhkelley58
2023-11-21 21:20 ` [PATCH v2 1/8] x86/coco: Use slow_virt_to_phys() in page transition hypervisor callbacks mhkelley58
2023-11-21 21:20 ` [PATCH v2 2/8] x86/mm: Don't do a TLB flush if changing a PTE that isn't marked present mhkelley58
2023-11-27 22:21 ` Edgecombe, Rick P [this message]
2023-11-28 17:34 ` Michael Kelley
2023-11-21 21:20 ` [PATCH v2 3/8] x86/mm: Remove "static" from vmap_pages_range() mhkelley58
2023-11-22 6:26 ` Christoph Hellwig
2023-11-23 0:24 ` Michael Kelley
2023-11-23 7:32 ` Christoph Hellwig
2023-11-27 1:06 ` Michael Kelley
2023-11-21 21:20 ` [PATCH v2 4/8] x86/sev: Enable PVALIDATE for PFNs without a valid virtual address mhkelley58
2023-11-27 21:38 ` Edgecombe, Rick P
2023-11-28 18:08 ` Michael Kelley
2023-11-28 18:59 ` Edgecombe, Rick P
2023-12-12 18:35 ` Michael Kelley
2023-11-21 21:20 ` [PATCH v2 5/8] x86/mm: Mark CoCo VM pages not present while changing encrypted state mhkelley58
2023-11-21 21:20 ` [PATCH v2 6/8] x86/mm: Merge CoCo prepare and finish hypervisor callbacks mhkelley58
2023-11-21 21:20 ` [PATCH v2 7/8] x86/mm: Remove unnecessary call layer for __set_memory_enc_pgtable() mhkelley58
2023-11-21 21:20 ` [PATCH v2 8/8] x86/mm: Add comments about errors in set_memory_decrypted()/encrypted() mhkelley58
2023-11-24 10:06 ` [PATCH v2 0/8] x86/coco: Mark CoCo VM pages not present when changing encrypted state kirill.shutemov
2023-11-28 19:12 ` Michael Kelley
2023-11-29 15:10 ` kirill.shutemov
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