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From: "Jiaxun Yang" <jiaxun.yang@flygoat.com>
To: "Gregory CLEMENT" <gregory.clement@bootlin.com>,
	"Aleksandar Rikalo" <arikalo@gmail.com>,
	"Thomas Bogendoerfer" <tsbogend@alpha.franken.de>,
	"Thomas Gleixner" <tglx@linutronix.de>
Cc: "linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
	linux-kernel@vger.kernel.org,
	"Vladimir Kondratiev" <vladimir.kondratiev@mobileye.com>,
	"Théo Lebrun" <theo.lebrun@bootlin.com>,
	"Tawfik Bayouk" <tawfik.bayouk@mobileye.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH] irqchip: mips-gic: Handle case with cluster without CPU cores
Date: Fri, 25 Oct 2024 21:47:18 +0100	[thread overview]
Message-ID: <4acb9693-ba68-4f09-a4da-677c8b1e583b@app.fastmail.com> (raw)
In-Reply-To: <87jzdvc3wo.fsf@BLaptop.bootlin.com>



在2024年10月25日十月 下午9:40，Gregory CLEMENT写道：
> Hi Jiaxun,
>
[...]
>> Is second cluster IOCU only?
>
> Yes indeed in EyeQ5, the second cluster is the place for many
> accelerator for vision that benefit of the L2 cache and of the coherency
> unit.

It makes sense to me then, that for the information. I just checked
IOCU only MPS release and indeed those special handling are necessary.

Reviewd-by: Jiaxun Yang <jiaxun.yang@flygoat.com>

I think some initialisation to IOCU and L2C in second cluster is also
necessary, but I guess those are already done by firmware in your case?

Thanks
-- 
- Jiaxun

  reply	other threads:[~2024-10-25 20:47 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-25 15:46 [PATCH] irqchip: mips-gic: Handle case with cluster without CPU cores Gregory CLEMENT
2024-10-25 16:43 ` Jiaxun Yang
2024-10-25 20:40   ` Gregory CLEMENT
2024-10-25 20:47     ` Jiaxun Yang [this message]
2024-10-28 13:24 ` Thomas Gleixner

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