From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: Joel Stanley <joel@jms.id.au>
Cc: qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH 01/13] hw/riscv/virt: Fix clint base address type
Date: Tue, 29 Apr 2025 09:59:10 -0300 [thread overview]
Message-ID: <4bf4345b-55f7-4d6f-b7ef-985accdd60a9@ventanamicro.com> (raw)
In-Reply-To: <20250429061223.1457166-2-joel@jms.id.au>
On 4/29/25 3:12 AM, Joel Stanley wrote:
> The address is a hardware address, so use hwaddr for consistency with
> the rest of the machine.
>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> ---
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> hw/riscv/virt.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index 17a790821484..e4c0ac8a2a9a 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -324,7 +324,7 @@ static void create_fdt_socket_clint(RISCVVirtState *s,
> int cpu;
> g_autofree char *clint_name = NULL;
> g_autofree uint32_t *clint_cells = NULL;
> - unsigned long clint_addr;
> + hwaddr clint_addr;
> MachineState *ms = MACHINE(s);
> static const char * const clint_compat[2] = {
> "sifive,clint0", "riscv,clint0"
> @@ -340,8 +340,8 @@ static void create_fdt_socket_clint(RISCVVirtState *s,
> }
>
> clint_addr = s->memmap[VIRT_CLINT].base +
> - (s->memmap[VIRT_CLINT].size * socket);
> - clint_name = g_strdup_printf("/soc/clint@%lx", clint_addr);
> + s->memmap[VIRT_CLINT].size * socket;
> + clint_name = g_strdup_printf("/soc/clint@%"HWADDR_PRIx, clint_addr);
> qemu_fdt_add_subnode(ms->fdt, clint_name);
> qemu_fdt_setprop_string_array(ms->fdt, clint_name, "compatible",
> (char **)&clint_compat,
next prev parent reply other threads:[~2025-04-29 13:01 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-29 6:12 [PATCH 00/13] hw/riscv/virt: device tree reg cleanups Joel Stanley
2025-04-29 6:12 ` [PATCH 01/13] hw/riscv/virt: Fix clint base address type Joel Stanley
2025-04-29 12:59 ` Daniel Henrique Barboza [this message]
2025-04-29 6:12 ` [PATCH 01/13] riscv/virt: Fix address type in create_fdt_socket_clint Joel Stanley
2025-04-29 12:26 ` Daniel Henrique Barboza
2025-04-30 11:36 ` Joel Stanley
2025-04-29 6:12 ` [PATCH 02/13] hw/riscv/virt: Use setprop_sized_cells for clint Joel Stanley
2025-04-29 17:22 ` Daniel Henrique Barboza
2025-04-29 6:12 ` [PATCH 03/13] hw/riscv/virt: Use setprop_sized_cells for memory Joel Stanley
2025-04-29 17:22 ` Daniel Henrique Barboza
2025-04-29 6:12 ` [PATCH 04/13] hw/riscv/virt: Use setprop_sized_cells for aplic Joel Stanley
2025-04-29 17:22 ` Daniel Henrique Barboza
2025-04-29 6:12 ` [PATCH 05/13] hw/riscv/virt: Use setprop_sized_cells for aclint Joel Stanley
2025-04-29 17:23 ` Daniel Henrique Barboza
2025-04-29 6:12 ` [PATCH 06/13] hw/riscv/virt: Use setprop_sized_cells for plic Joel Stanley
2025-04-29 17:23 ` Daniel Henrique Barboza
2025-04-29 6:12 ` [PATCH 07/13] hw/riscv/virt: Use setprop_sized_cells for virtio Joel Stanley
2025-04-29 17:23 ` Daniel Henrique Barboza
2025-04-29 6:12 ` [PATCH 08/13] hw/riscv/virt: Use setprop_sized_cells for reset Joel Stanley
2025-04-29 17:23 ` Daniel Henrique Barboza
2025-04-29 6:12 ` [PATCH 09/13] hw/riscv/virt: Use setprop_sized_cells for uart Joel Stanley
2025-04-29 17:24 ` Daniel Henrique Barboza
2025-04-29 6:12 ` [PATCH 10/13] hw/riscv/virt: Use setprop_sized_cells for rtc Joel Stanley
2025-04-29 17:24 ` Daniel Henrique Barboza
2025-04-29 6:12 ` [PATCH 11/13] hw/riscv/virt: Use setprop_sized_cells for iommu Joel Stanley
2025-04-29 17:24 ` Daniel Henrique Barboza
2025-04-29 6:12 ` [PATCH 12/13] hw/riscv/virt: Use setprop_sized_cells for pcie Joel Stanley
2025-04-29 17:24 ` Daniel Henrique Barboza
2025-04-29 6:12 ` [PATCH 13/13] NOMERGE: virt: Adjust devices so everything is > 4G Joel Stanley
2025-04-29 23:45 ` [PATCH 00/13] hw/riscv/virt: device tree reg cleanups Alistair Francis
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