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charset=UTF-8 Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240711_020547_578077_4BC65620 X-CRM114-Status: GOOD ( 12.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alexandre.belloni@bootlin.com, Jason@zx2c4.com, palmer@rivosinc.com, claudiu.beznea@tuxon.dev, Laurent.pinchart@ideasonboard.com, andrzej.hajda@intel.com, Hari.PrasathGE@microchip.com, airlied@gmail.com, robh@kernel.org, rfoss@kernel.org, mpe@ellerman.id.au, linux@armlinux.org.uk, jernej.skrabec@gmail.com, devicetree@vger.kernel.org, conor+dt@kernel.org, tzimmermann@suse.de, arnd@arndb.de, jonas@kwiboo.se, maarten.lankhorst@linux.intel.com, mripard@kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, neil.armstrong@linaro.org, rdunlap@infradead.org, linux-kernel@vger.kernel.org, daniel@ffwll.ch, krzk+dt@kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 11/07/2024 10:30, Manikandan.M@microchip.com wrote: > Hi Krzysztof, > > On 04/07/24 4:27 pm, Krzysztof Kozlowski wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >> >> On 04/07/2024 10:48, Manikandan Muralidharan wrote: >>> Add the Microchip's DSI controller wrapper driver that uses >>> the Synopsys DesignWare MIPI DSI host controller bridge. >>> >>> Signed-off-by: Manikandan Muralidharan >>> --- >> >> >> ... >> >>> + >>> +#define HSTT(_maxfreq, _c_lp2hs, _c_hs2lp, _d_lp2hs, _d_hs2lp) \ >>> +{ \ >>> + .maxfreq = _maxfreq, \ >>> + .timing = { \ >>> + .clk_lp2hs = _c_lp2hs, \ >>> + .clk_hs2lp = _c_hs2lp, \ >>> + .data_lp2hs = _d_lp2hs, \ >>> + .data_hs2lp = _d_hs2lp, \ >>> + } \ >>> +} >>> + >>> +struct hstt hstt_table[] = { >> >> So more globals? No. > > In the sam9x7 datasheet, the high speed transition time for data and > clock lane at different freq for the DSI controller ranges are tabulated > with constant values. > I referred other similar platforms for the functionality and found > similar way of implementation, only a few had equations to derive the > low power and high speed timings.I am not able to come up with a more > efficient method. If there is something I am missing, please suggest. > TIA Yeah, this should not be a global. Nothing above suggests it. BTW, no W=1 clang warnings? Are you sure? Best regards, Krzysztof From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E40AC155308; Thu, 11 Jul 2024 09:05:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720688747; cv=none; b=NKMHVum9BIFvCTIASPCKgSHpiGKfJ/32rb72Zd0UjP4Brlwo0qxqDxPg8tfocEwHf32A0njZUHtFtRL+thCBTiys9DxWQbx6uiQJr5S5YDC5RwoOZarnDYa2vOqP9h7Ru9+lNS/1x9z/9YbrshBXGTfh8rKUJi0nNcVGwe0y2h4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720688747; c=relaxed/simple; bh=NWyzMVDXUKeLPeToQ/9acrPTXN/Uzd3RljPeeuoq4qE=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=p2OqL+ewpMKI3q/KRUD2OYcSFvNgO5MYvSGeC+fpfu1/MLVE89Zf6+wmrLF9mh48s1Ne/pnFnsbP04O+tLOIA7UfDA1Vi9/CBRkwQFvCU9NsV2cfeXO9qBYmK/CO0GYgUI3VfzZ7p+xA1Vq1Rbw/oKiszR8CKnMaH5psgsu0LKU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=jH5FyGxF; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="jH5FyGxF" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E8F5FC4AF09; Thu, 11 Jul 2024 09:05:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1720688746; bh=NWyzMVDXUKeLPeToQ/9acrPTXN/Uzd3RljPeeuoq4qE=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=jH5FyGxFtY1wRriHBOlZRbhM+sPpzv324Mt4uFMqwJnw6wUSlTyPOqlZgvq2gAyFo pbxdMPEGFlsMeD4VpCfU2Vx9pQAr8mDhglklrrxqg9zCox3Z1AA2/ynqG0/4BxFHkE h/fegEOav8H1ld9sohx5wpd8FSyAI8w2AdXeTkR7wweHMaQoXTFjmaA5hqQF6XXpnQ FZmOFWfBlgYXPp4Sryr8ZZHtvO3guG8FXR+8Hl6pUIN180SmMgVib5Ym/LnhuWr/sa A+QIm4AUPxZEpuU8LUvXfzPcZlxfOACdEYalayK7G1vMLJ91RsClWTV1yqvYPQFcJc ecH9tvhW4nTBg== Message-ID: <4c1b7af7-e53c-492a-9c41-40cad78f7666@kernel.org> Date: Thu, 11 Jul 2024 11:05:37 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/4] drm/bridge: add Microchip DSI controller support for sam9x7 SoC series To: Manikandan.M@microchip.com Cc: Hari.PrasathGE@microchip.com, andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, daniel@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux@armlinux.org.uk, Nicolas.Ferre@microchip.com, alexandre.belloni@bootlin.com, claudiu.beznea@tuxon.dev, arnd@arndb.de, Jason@zx2c4.com, palmer@rivosinc.com, mpe@ellerman.id.au, rdunlap@infradead.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20240704084837.168075-1-manikandan.m@microchip.com> <20240704084837.168075-3-manikandan.m@microchip.com> <9ef5a1ba-e404-46e0-8513-5fffbfb5618b@kernel.org> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 11/07/2024 10:30, Manikandan.M@microchip.com wrote: > Hi Krzysztof, > > On 04/07/24 4:27 pm, Krzysztof Kozlowski wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >> >> On 04/07/2024 10:48, Manikandan Muralidharan wrote: >>> Add the Microchip's DSI controller wrapper driver that uses >>> the Synopsys DesignWare MIPI DSI host controller bridge. >>> >>> Signed-off-by: Manikandan Muralidharan >>> --- >> >> >> ... >> >>> + >>> +#define HSTT(_maxfreq, _c_lp2hs, _c_hs2lp, _d_lp2hs, _d_hs2lp) \ >>> +{ \ >>> + .maxfreq = _maxfreq, \ >>> + .timing = { \ >>> + .clk_lp2hs = _c_lp2hs, \ >>> + .clk_hs2lp = _c_hs2lp, \ >>> + .data_lp2hs = _d_lp2hs, \ >>> + .data_hs2lp = _d_hs2lp, \ >>> + } \ >>> +} >>> + >>> +struct hstt hstt_table[] = { >> >> So more globals? No. > > In the sam9x7 datasheet, the high speed transition time for data and > clock lane at different freq for the DSI controller ranges are tabulated > with constant values. > I referred other similar platforms for the functionality and found > similar way of implementation, only a few had equations to derive the > low power and high speed timings.I am not able to come up with a more > efficient method. If there is something I am missing, please suggest. > TIA Yeah, this should not be a global. Nothing above suggests it. BTW, no W=1 clang warnings? Are you sure? Best regards, Krzysztof