[PATCH 3 of 3] x86/mm: Enable paging and sharing in AMD NPT mode

[Andres Lagar-Cavilla <andres@lagarcavilla.org>]

 xen/arch/x86/mm/mem_event.c   |  7 +++++--
 xen/arch/x86/mm/mem_sharing.c |  7 +++++++
 2 files changed, 12 insertions(+), 2 deletions(-)


Both features are mutually exclusive with sharing iommu and p2m tables.

Signed-off-by: Andres Lagar-Cavilla <andres@lagarcavilla.org>
Signed-off-by: Adin Scannell <adin@scannell.ca>

diff -r d6c3c77ad749 -r 4c6bee5a191a xen/arch/x86/mm/mem_event.c
--- a/xen/arch/x86/mm/mem_event.c
+++ b/xen/arch/x86/mm/mem_event.c
@@ -550,8 +550,11 @@ int mem_event_domctl(struct domain *d, x
             if ( !hap_enabled(d) )
                 break;
 
-            /* Currently only EPT is supported */
-            if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
+            /* Currently EPT or AMD with no iommu/hap page table sharing are
+             * supported */
+            if ( !((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) ||
+                   ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && 
+                     !iommu_hap_pt_share)) )
                 break;
 
             rc = -EXDEV;
diff -r d6c3c77ad749 -r 4c6bee5a191a xen/arch/x86/mm/mem_sharing.c
--- a/xen/arch/x86/mm/mem_sharing.c
+++ b/xen/arch/x86/mm/mem_sharing.c
@@ -1202,6 +1202,13 @@ int mem_sharing_domctl(struct domain *d,
     if ( !hap_enabled(d) )
          return -ENODEV;
 
+    /* Currently EPT or AMD with no iommu/hap page table sharing are
+     * supported */
+    if ( !((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) ||
+           ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && 
+             !iommu_hap_pt_share)) )
+        return -ENODEV;
+
     switch(mec->op)
     {
         case XEN_DOMCTL_MEM_SHARING_CONTROL: