From: "Christian König" <christian.koenig@amd.com>
To: Alex Deucher <alexander.deucher@amd.com>,
amd-gfx@lists.freedesktop.org, sasundar@amd.com
Subject: Re: [PATCH 06/30] drm/amdgpu: move scheduler wqueue handling into callbacks
Date: Thu, 26 Jun 2025 11:33:28 +0200 [thread overview]
Message-ID: <4d5a8aff-6708-4f09-b9fe-60b472105313@amd.com> (raw)
In-Reply-To: <20250625210638.422479-7-alexander.deucher@amd.com>
On 25.06.25 23:06, Alex Deucher wrote:
> Move the scheduler wqueue stopping and starting into
> the ring reset callbacks. On some IPs we have to reset
> an engine which may have multiple queues. Move the wqueue
> handling into the backend so we can handle them as needed
> based on the type of reset available.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 8 --------
> drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c | 17 ++++-------------
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 6 ++++++
> drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 6 ++++++
> drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 6 ++++++
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 3 +++
> drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 3 +++
> drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c | 2 ++
> drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c | 2 ++
> drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c | 2 ++
> drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c | 2 ++
> drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c | 2 ++
> drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c | 2 ++
> drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 3 +++
> drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 3 +++
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 2 ++
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 3 +++
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c | 2 ++
> drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c | 2 ++
> 19 files changed, 55 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> index 3b7d3844a74bc..f0b7080dccb8d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> @@ -135,17 +135,9 @@ static enum drm_gpu_sched_stat amdgpu_job_timedout(struct drm_sched_job *s_job)
> } else if (amdgpu_gpu_recovery && ring->funcs->reset) {
> dev_err(adev->dev, "Starting %s ring reset\n",
> s_job->sched->name);
> -
> - /*
> - * Stop the scheduler to prevent anybody else from touching the
> - * ring buffer.
> - */
> - drm_sched_wqueue_stop(&ring->sched);
> -
> r = amdgpu_ring_reset(ring, job->vmid, NULL);
> if (!r) {
> atomic_inc(&ring->adev->gpu_reset_counter);
> - drm_sched_wqueue_start(&ring->sched);
> dev_err(adev->dev, "Ring %s reset succeeded\n",
> ring->sched.name);
> drm_dev_wedged_event(adev_to_drm(adev),
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
> index cf5733d5d26dd..7e26a44dcc1fd 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
> @@ -554,22 +554,16 @@ int amdgpu_sdma_reset_engine(struct amdgpu_device *adev, uint32_t instance_id)
> struct amdgpu_sdma_instance *sdma_instance = &adev->sdma.instance[instance_id];
> struct amdgpu_ring *gfx_ring = &sdma_instance->ring;
> struct amdgpu_ring *page_ring = &sdma_instance->page;
> - bool gfx_sched_stopped = false, page_sched_stopped = false;
>
> mutex_lock(&sdma_instance->engine_reset_mutex);
> /* Stop the scheduler's work queue for the GFX and page rings if they are running.
> * This ensures that no new tasks are submitted to the queues while
> * the reset is in progress.
> */
> - if (!amdgpu_ring_sched_ready(gfx_ring)) {
> - drm_sched_wqueue_stop(&gfx_ring->sched);
> - gfx_sched_stopped = true;
> - }
> + drm_sched_wqueue_stop(&gfx_ring->sched);
>
> - if (adev->sdma.has_page_queue && !amdgpu_ring_sched_ready(page_ring)) {
> + if (adev->sdma.has_page_queue)
> drm_sched_wqueue_stop(&page_ring->sched);
> - page_sched_stopped = true;
> - }
>
> if (sdma_instance->funcs->stop_kernel_queue) {
> sdma_instance->funcs->stop_kernel_queue(gfx_ring);
> @@ -596,12 +590,9 @@ int amdgpu_sdma_reset_engine(struct amdgpu_device *adev, uint32_t instance_id)
> * to be submitted to the queues after the reset is complete.
> */
> if (!ret) {
> - if (gfx_sched_stopped && amdgpu_ring_sched_ready(gfx_ring)) {
> - drm_sched_wqueue_start(&gfx_ring->sched);
> - }
> - if (page_sched_stopped && amdgpu_ring_sched_ready(page_ring)) {
> + drm_sched_wqueue_start(&gfx_ring->sched);
> + if (adev->sdma.has_page_queue)
> drm_sched_wqueue_start(&page_ring->sched);
> - }
> }
> mutex_unlock(&sdma_instance->engine_reset_mutex);
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index 4d0ee3ffe9858..8c377ecbb8a75 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -9540,6 +9540,8 @@ static int gfx_v10_0_reset_kgq(struct amdgpu_ring *ring,
> if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
> return -EINVAL;
>
> + drm_sched_wqueue_stop(&ring->sched);
> +
> spin_lock_irqsave(&kiq->ring_lock, flags);
>
> if (amdgpu_ring_alloc(kiq_ring, 5 + 7 + 7 + kiq->pmf->map_queues_size)) {
> @@ -9581,6 +9583,7 @@ static int gfx_v10_0_reset_kgq(struct amdgpu_ring *ring,
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> @@ -9600,6 +9603,8 @@ static int gfx_v10_0_reset_kcq(struct amdgpu_ring *ring,
> if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
> return -EINVAL;
>
> + drm_sched_wqueue_stop(&ring->sched);
> +
> spin_lock_irqsave(&kiq->ring_lock, flags);
>
> if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size)) {
> @@ -9658,6 +9663,7 @@ static int gfx_v10_0_reset_kcq(struct amdgpu_ring *ring,
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> index 39f4dd18c277b..37dcec2d07841 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> @@ -6821,6 +6821,8 @@ static int gfx_v11_0_reset_kgq(struct amdgpu_ring *ring,
> if (amdgpu_sriov_vf(adev))
> return -EINVAL;
>
> + drm_sched_wqueue_stop(&ring->sched);
> +
> r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, false);
> if (r) {
>
> @@ -6846,6 +6848,7 @@ static int gfx_v11_0_reset_kgq(struct amdgpu_ring *ring,
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> @@ -6989,6 +6992,8 @@ static int gfx_v11_0_reset_kcq(struct amdgpu_ring *ring,
> if (amdgpu_sriov_vf(adev))
> return -EINVAL;
>
> + drm_sched_wqueue_stop(&ring->sched);
> +
> r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, true);
> if (r) {
> dev_warn(adev->dev, "fail(%d) to reset kcq and try pipe reset\n", r);
> @@ -7012,6 +7017,7 @@ static int gfx_v11_0_reset_kcq(struct amdgpu_ring *ring,
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> index 964fa3f2e2719..e4fc42470cf3e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> @@ -5317,6 +5317,8 @@ static int gfx_v12_0_reset_kgq(struct amdgpu_ring *ring,
> if (amdgpu_sriov_vf(adev))
> return -EINVAL;
>
> + drm_sched_wqueue_stop(&ring->sched);
> +
> r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, false);
> if (r) {
> dev_warn(adev->dev, "reset via MES failed and try pipe reset %d\n", r);
> @@ -5341,6 +5343,7 @@ static int gfx_v12_0_reset_kgq(struct amdgpu_ring *ring,
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> @@ -5437,6 +5440,8 @@ static int gfx_v12_0_reset_kcq(struct amdgpu_ring *ring,
> if (amdgpu_sriov_vf(adev))
> return -EINVAL;
>
> + drm_sched_wqueue_stop(&ring->sched);
> +
> r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, true);
> if (r) {
> dev_warn(adev->dev, "fail(%d) to reset kcq and try pipe reset\n", r);
> @@ -5460,6 +5465,7 @@ static int gfx_v12_0_reset_kcq(struct amdgpu_ring *ring,
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 95e319974f221..76ba664efecb3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -7187,6 +7187,8 @@ static int gfx_v9_0_reset_kcq(struct amdgpu_ring *ring,
> if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
> return -EINVAL;
>
> + drm_sched_wqueue_stop(&ring->sched);
> +
> spin_lock_irqsave(&kiq->ring_lock, flags);
>
> if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size)) {
> @@ -7247,6 +7249,7 @@ static int gfx_v9_0_reset_kcq(struct amdgpu_ring *ring,
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> index 8bfee17a826e2..daed0f187bda5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> @@ -3567,6 +3567,8 @@ static int gfx_v9_4_3_reset_kcq(struct amdgpu_ring *ring,
> if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
> return -EINVAL;
>
> + drm_sched_wqueue_stop(&ring->sched);
> +
> spin_lock_irqsave(&kiq->ring_lock, flags);
>
> if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size)) {
> @@ -3625,6 +3627,7 @@ static int gfx_v9_4_3_reset_kcq(struct amdgpu_ring *ring,
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> index 6621a7b1f29fc..781a5a8a83614 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> @@ -770,12 +770,14 @@ static int jpeg_v2_0_ring_reset(struct amdgpu_ring *ring,
> {
> int r;
>
> + drm_sched_wqueue_stop(&ring->sched);
> jpeg_v2_0_stop(ring->adev);
> jpeg_v2_0_start(ring->adev);
> r = amdgpu_ring_test_helper(ring);
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
> index 44a5c0e82ca43..5be9cdcae32c1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
> @@ -649,12 +649,14 @@ static int jpeg_v2_5_ring_reset(struct amdgpu_ring *ring,
> {
> int r;
>
> + drm_sched_wqueue_stop(&ring->sched);
> jpeg_v2_5_stop_inst(ring->adev, ring->me);
> jpeg_v2_5_start_inst(ring->adev, ring->me);
> r = amdgpu_ring_test_helper(ring);
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
> index e813af4eedd21..a24bd833d6442 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
> @@ -561,12 +561,14 @@ static int jpeg_v3_0_ring_reset(struct amdgpu_ring *ring,
> {
> int r;
>
> + drm_sched_wqueue_stop(&ring->sched);
> jpeg_v3_0_stop(ring->adev);
> jpeg_v3_0_start(ring->adev);
> r = amdgpu_ring_test_helper(ring);
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> index 190f0742d7016..1d4edd77837d0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> @@ -729,12 +729,14 @@ static int jpeg_v4_0_ring_reset(struct amdgpu_ring *ring,
> if (amdgpu_sriov_vf(ring->adev))
> return -EINVAL;
>
> + drm_sched_wqueue_stop(&ring->sched);
> jpeg_v4_0_stop(ring->adev);
> jpeg_v4_0_start(ring->adev);
> r = amdgpu_ring_test_helper(ring);
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> index 04755b7a62d9b..78441f8fce972 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> @@ -1152,12 +1152,14 @@ static int jpeg_v4_0_3_ring_reset(struct amdgpu_ring *ring,
> if (amdgpu_sriov_vf(ring->adev))
> return -EOPNOTSUPP;
>
> + drm_sched_wqueue_stop(&ring->sched);
> jpeg_v4_0_3_core_stall_reset(ring);
> jpeg_v4_0_3_start_jrbc(ring);
> r = amdgpu_ring_test_helper(ring);
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c
> index e7f942dc714a7..6f8a16da9d608 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c
> @@ -843,12 +843,14 @@ static int jpeg_v5_0_1_ring_reset(struct amdgpu_ring *ring,
> if (amdgpu_sriov_vf(ring->adev))
> return -EOPNOTSUPP;
>
> + drm_sched_wqueue_stop(&ring->sched);
> jpeg_v5_0_1_core_stall_reset(ring);
> jpeg_v5_0_1_init_jrbc(ring);
> r = amdgpu_ring_test_helper(ring);
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
> index 4b6a799704f1f..103e5ec7aa63b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
> @@ -1586,6 +1586,8 @@ static int sdma_v6_0_reset_queue(struct amdgpu_ring *ring,
> return -EINVAL;
> }
>
> + drm_sched_wqueue_stop(&ring->sched);
> +
> r = amdgpu_mes_reset_legacy_queue(adev, ring, vmid, true);
> if (r)
> return r;
> @@ -1594,6 +1596,7 @@ static int sdma_v6_0_reset_queue(struct amdgpu_ring *ring,
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
> index b00c63812899d..99a080bad2a3d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
> @@ -822,6 +822,8 @@ static int sdma_v7_0_reset_queue(struct amdgpu_ring *ring,
> return -EINVAL;
> }
>
> + drm_sched_wqueue_stop(&ring->sched);
> +
> r = amdgpu_mes_reset_legacy_queue(adev, ring, vmid, true);
> if (r)
> return r;
> @@ -830,6 +832,7 @@ static int sdma_v7_0_reset_queue(struct amdgpu_ring *ring,
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> index 6c25e9fc4f0f9..eec9133e1b2c4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> @@ -1978,6 +1978,7 @@ static int vcn_v4_0_ring_reset(struct amdgpu_ring *ring,
> if (!(adev->vcn.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE))
> return -EOPNOTSUPP;
>
> + drm_sched_wqueue_stop(&ring->sched);
> vcn_v4_0_stop(vinst);
> vcn_v4_0_start(vinst);
>
> @@ -1985,6 +1986,7 @@ static int vcn_v4_0_ring_reset(struct amdgpu_ring *ring,
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> index 1e1dd61b774ec..d8fd32c1e38ec 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> @@ -1609,6 +1609,8 @@ static int vcn_v4_0_3_ring_reset(struct amdgpu_ring *ring,
> if (!(adev->vcn.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE))
> return -EOPNOTSUPP;
>
> + drm_sched_wqueue_stop(&ring->sched);
> +
> vcn_inst = GET_INST(VCN, ring->me);
> r = amdgpu_dpm_reset_vcn(adev, 1 << vcn_inst);
>
> @@ -1626,6 +1628,7 @@ static int vcn_v4_0_3_ring_reset(struct amdgpu_ring *ring,
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
> index 9c02446bb1a54..7e37ddea63550 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
> @@ -1476,6 +1476,7 @@ static int vcn_v4_0_5_ring_reset(struct amdgpu_ring *ring,
> if (!(adev->vcn.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE))
> return -EOPNOTSUPP;
>
> + drm_sched_wqueue_stop(&ring->sched);
> vcn_v4_0_5_stop(vinst);
> vcn_v4_0_5_start(vinst);
>
> @@ -1483,6 +1484,7 @@ static int vcn_v4_0_5_ring_reset(struct amdgpu_ring *ring,
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> index c8924f97cf58a..47c0bcc9e7d80 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> @@ -1203,6 +1203,7 @@ static int vcn_v5_0_0_ring_reset(struct amdgpu_ring *ring,
> if (!(adev->vcn.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE))
> return -EOPNOTSUPP;
>
> + drm_sched_wqueue_stop(&ring->sched);
> vcn_v5_0_0_stop(vinst);
> vcn_v5_0_0_start(vinst);
>
> @@ -1210,6 +1211,7 @@ static int vcn_v5_0_0_ring_reset(struct amdgpu_ring *ring,
> if (r)
> return r;
> amdgpu_fence_driver_force_completion(ring);
> + drm_sched_wqueue_start(&ring->sched);
> return 0;
> }
>
next prev parent reply other threads:[~2025-06-26 9:33 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-25 21:06 [PATCH V11 00/30] Reset improvements Alex Deucher
2025-06-25 21:06 ` [PATCH 01/30] drm/amdgpu: remove job parameter from amdgpu_fence_emit() Alex Deucher
2025-06-26 9:10 ` Christian König
2025-06-25 21:06 ` [PATCH 02/30] drm/amdgpu: update ring reset function signature Alex Deucher
2025-06-25 21:06 ` [PATCH 03/30] drm/amdgpu: rework queue reset scheduler interaction Alex Deucher
2025-06-25 21:06 ` [PATCH 04/30] drm/amdgpu: move force completion into ring resets Alex Deucher
2025-06-25 21:06 ` [PATCH 05/30] drm/amdgpu: move guilty handling " Alex Deucher
2025-06-25 21:06 ` [PATCH 06/30] drm/amdgpu: move scheduler wqueue handling into callbacks Alex Deucher
2025-06-26 9:33 ` Christian König [this message]
2025-06-25 21:06 ` [PATCH 07/30] drm/amdgpu: track ring state associated with a fence Alex Deucher
2025-06-26 11:02 ` Christian König
2025-06-26 17:25 ` Alex Deucher
2025-06-25 21:06 ` [PATCH 08/30] drm/amdgpu/gfx9: re-emit unprocessed state on kcq reset Alex Deucher
2025-06-25 21:06 ` [PATCH 09/30] drm/amdgpu/gfx9.4.3: " Alex Deucher
2025-06-25 21:06 ` [PATCH 10/30] drm/amdgpu/gfx10: re-emit unprocessed state on ring reset Alex Deucher
2025-06-25 21:06 ` [PATCH 11/30] drm/amdgpu/gfx11: " Alex Deucher
2025-06-25 21:06 ` [PATCH 12/30] drm/amdgpu/gfx12: " Alex Deucher
2025-06-25 21:06 ` [PATCH 13/30] drm/amdgpu/sdma6: " Alex Deucher
2025-06-25 21:06 ` [PATCH 14/30] drm/amdgpu/sdma7: " Alex Deucher
2025-06-25 21:06 ` [PATCH 15/30] drm/amdgpu/jpeg2: " Alex Deucher
2025-06-25 21:06 ` [PATCH 16/30] drm/amdgpu/jpeg2.5: " Alex Deucher
2025-06-25 21:06 ` [PATCH 17/30] drm/amdgpu/jpeg3: " Alex Deucher
2025-06-25 21:06 ` [PATCH 18/30] drm/amdgpu/jpeg4: " Alex Deucher
2025-06-25 21:06 ` [PATCH 19/30] drm/amdgpu/jpeg4.0.3: " Alex Deucher
2025-06-25 21:06 ` [PATCH 20/30] drm/amdgpu/jpeg4.0.5: add queue reset Alex Deucher
2025-06-25 21:06 ` [PATCH 21/30] drm/amdgpu/jpeg5: " Alex Deucher
2025-06-25 21:06 ` [PATCH 22/30] drm/amdgpu/jpeg5.0.1: re-emit unprocessed state on ring reset Alex Deucher
2025-06-25 21:06 ` [PATCH 23/30] drm/amdgpu/vcn4: " Alex Deucher
2025-06-25 21:06 ` [PATCH 24/30] drm/amdgpu/vcn4.0.3: " Alex Deucher
2025-06-25 21:06 ` [PATCH 25/30] drm/amdgpu/vcn4.0.5: " Alex Deucher
2025-06-25 21:06 ` [PATCH 26/30] drm/amdgpu/vcn5: " Alex Deucher
2025-06-25 21:06 ` [PATCH 27/30] drm/amdgpu/vcn: add a helper framework for engine resets Alex Deucher
2025-06-25 21:06 ` [PATCH 28/30] drm/amdgpu/vcn2: implement ring reset Alex Deucher
2025-06-25 21:06 ` [PATCH 29/30] drm/amdgpu/vcn2.5: " Alex Deucher
2025-06-25 21:06 ` [PATCH 30/30] drm/amdgpu/vcn3: " Alex Deucher
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