Re: [PATCH v5 2/3] soc/tegra: pmc: Add core power domain

[Dmitry Osipenko <digetx@gmail.com>]

31.05.2021 15:36, Thierry Reding пишет:
> On Mon, May 17, 2021 at 02:17:54AM +0300, Dmitry Osipenko wrote:
>> NVIDIA Tegra SoCs have multiple power domains, each domain corresponds
>> to an external SoC power rail. Core power domain covers vast majority of
>> hardware blocks within a Tegra SoC. The voltage of a power domain should
>> be set to a level which satisfies all devices within the power domain.
>> Add support for the core power domain which controls voltage state of the
>> domain. This allows us to support system-wide DVFS on Tegra20-210 SoCs.
>> The PMC powergate domains now are sub-domains of the core domain, this
>> requires device-tree updating, older DTBs are unaffected.
>>
>> Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
>> Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
>> Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
>> Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
>> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
>> ---
>>  drivers/soc/tegra/Kconfig  |  14 ++++
>>  drivers/soc/tegra/pmc.c    | 143 +++++++++++++++++++++++++++++++++++++
>>  include/soc/tegra/common.h |   6 ++
>>  3 files changed, 163 insertions(+)
> 
> Since this power domain code is all dealt with within the PMC driver,
> and the PMC driver is enabled on all platforms, how about if we avoid
> creating the additional SOC_TEGRA_COMMON kconfig option and instead
> make SOC_TEGRA_PMC list the dependencies?
> 
> No need to resend, I can make that change when I apply, if you agree.

This can be done. I'll send v6 with the fixed compile-testing anyways,
so will apply this change there too.

The most recent version of this patch is found in [1]. Sorry for sending
so many versions and creating confusion, I settled on a unified series
that takes all build dependencies into account.

[1] https://patchwork.ozlabs.org/project/linux-tegra/list/?series=246158

Thank you for the review.