From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C040C07E99 for ; Fri, 9 Jul 2021 12:48:09 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2912661220 for ; Fri, 9 Jul 2021 12:48:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2912661220 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AE2896EA1C; Fri, 9 Jul 2021 12:48:07 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3906C6EA1C for ; Fri, 9 Jul 2021 12:48:06 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10039"; a="196872362" X-IronPort-AV: E=Sophos;i="5.84,226,1620716400"; d="scan'208";a="196872362" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jul 2021 05:48:01 -0700 X-IronPort-AV: E=Sophos;i="5.84,226,1620716400"; d="scan'208";a="488033192" Received: from ashfaqur-mobl.ger.corp.intel.com (HELO [10.252.48.40]) ([10.252.48.40]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jul 2021 05:47:58 -0700 To: Matthew Auld References: <20210701114234.3859716-1-maarten.lankhorst@linux.intel.com> <4dfba196-0106-6a20-aac1-4ca90c91f899@linux.intel.com> From: Maarten Lankhorst Message-ID: <4df9ac49-93c2-a9c2-03a3-1f6542700d8d@linux.intel.com> Date: Fri, 9 Jul 2021 14:47:56 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.9.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US Subject: Re: [Intel-gfx] [PATCH] drm/i915: Add TTM offset argument to mmap. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Ekstrand, Jason" , Intel Graphics Development , Kenneth Graunke Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Op 09-07-2021 om 11:30 schreef Matthew Auld: > On Mon, 5 Jul 2021 at 15:36, Matthew Auld > wrote: >> On Thu, 1 Jul 2021 at 12:50, Maarten Lankhorst >> wrote: >>> Op 01-07-2021 om 13:42 schreef Maarten Lankhorst: >>>> This is only used for ttm, and tells userspace that the mapping type is >>>> ignored. This disables the other type of mmap offsets when discrete >>>> memory is used, so fix the selftests as well. >>>> >>>> Signed-off-by: Maarten Lankhorst >>>> --- >>>> drivers/gpu/drm/i915/gem/i915_gem_mman.c | 17 +++++++++++- >>>> .../gpu/drm/i915/gem/i915_gem_object_types.h | 1 + >>>> .../drm/i915/gem/selftests/i915_gem_mman.c | 27 +++++++++++++++++-- >>>> include/uapi/drm/i915_drm.h | 9 ++++--- >>>> 4 files changed, 47 insertions(+), 7 deletions(-) >>>> >>>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c >>>> index a90f796e85c0..b34be9e5d094 100644 >>>> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c >>>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c >>>> @@ -679,10 +679,16 @@ __assign_mmap_offset(struct drm_i915_gem_object *obj, >>>> return -ENODEV; >>>> >>>> if (obj->ops->mmap_offset) { >>>> + if (mmap_type != I915_MMAP_TYPE_TTM) >>>> + return -ENODEV; >>>> + >>>> *offset = obj->ops->mmap_offset(obj); >>>> return 0; >>>> } >>>> >>>> + if (mmap_type == I915_MMAP_TYPE_TTM) >>>> + return -ENODEV; >>>> + >>>> if (mmap_type != I915_MMAP_TYPE_GTT && >>>> !i915_gem_object_has_struct_page(obj) && >>>> !i915_gem_object_has_iomem(obj)) >>>> @@ -727,7 +733,9 @@ i915_gem_dumb_mmap_offset(struct drm_file *file, >>>> { >>>> enum i915_mmap_type mmap_type; >>>> >>>> - if (boot_cpu_has(X86_FEATURE_PAT)) >>>> + if (HAS_LMEM(to_i915(dev))) >>>> + mmap_type = I915_MMAP_TYPE_TTM; >>>> + else if (boot_cpu_has(X86_FEATURE_PAT)) >>>> mmap_type = I915_MMAP_TYPE_WC; >> Hmm, I think we still need to check for X86_FEATURE_PAT somewhere, >> since this is still just WC for lmem? >> >>>> else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt)) >>>> return -ENODEV; >>>> @@ -798,6 +806,10 @@ i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data, >>>> type = I915_MMAP_TYPE_UC; >>>> break; >>>> >>>> + case I915_MMAP_OFFSET_TTM: >>>> + type = I915_MMAP_TYPE_TTM; >>>> + break; >> Would it not be simpler to just convert to WC or WB here, if we >> encounter _TTM? With that we also don't need to touch the dumb mmap >> stuff and i915_gem_mmap()? >> >> if (IS_DGFX()) { >> if (args->type != OFFSET_TTM) >> return -ENODEV: >> >> GEM_BUG_ON(!obj->mm.n_placements); >> if (i915_gem_object_placement_possible(obj, INTEL_MEMORY_LOCAL)) { >> type = TYPE_WC; >> else >> ttype = TYPE_WB; >> } >> >> https://patchwork.freedesktop.org/patch/442579/?series=92209&rev=1 > fyi this patch is now merged, in case you need the > i915_gem_object_placement_possible() helper. I think a separate type is better, as it could still be mapped WB if evicted to system memory? ~Maarten _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx