From: 李志 <lizhi2@eswincomputing.com>
To: "Andrew Lunn" <andrew@lunn.ch>
Cc: devicetree@vger.kernel.org, andrew+netdev@lunn.ch,
davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
netdev@vger.kernel.org, pabeni@redhat.com,
mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com,
rmk+kernel@armlinux.org.uk,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, ningyu@eswincomputing.com,
linmin@eswincomputing.com, pinkesh.vaghela@einfochips.com,
weishangjuan@eswincomputing.com
Subject: Re: Re: Re: [PATCH v1 1/2] dt-bindings: ethernet: eswin: add clock sampling control
Date: Fri, 23 Jan 2026 11:00:16 +0800 (GMT+08:00) [thread overview]
Message-ID: <4e2a55e7.3662.19be8cb9c3c.Coremail.lizhi2@eswincomputing.com> (raw)
In-Reply-To: <59cec617-0189-4dc3-bc3f-6346155a62ae@lunn.ch>
> -----原始邮件-----
> 发件人: "Andrew Lunn" <andrew@lunn.ch>
> 发送时间:2026-01-22 21:32:34 (星期四)
> 收件人: 李志 <lizhi2@eswincomputing.com>
> 抄送: devicetree@vger.kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, netdev@vger.kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, rmk+kernel@armlinux.org.uk, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ningyu@eswincomputing.com, linmin@eswincomputing.com, pinkesh.vaghela@einfochips.com, weishangjuan@eswincomputing.com
> 主题: Re: Re: [PATCH v1 1/2] dt-bindings: ethernet: eswin: add clock sampling control
>
> > On EIC7700, RXC and RXD experience an internal skew before reaching the
> > MAC. At high speed, this can shift the effective sampling point by
> > approximately half a cycle, causing the MAC to sample the wrong nibble
> > on each edge.
>
> You say internal. So the skew is fixed, it is a property of the
> silicon? If so, why a DT property? Why not just hard code it in the
> driver? Since it is internal, different boards should not need it set
> differently?
>
Thanks for the question.
EIC7700 has two Ethernet MACs. Only eth1 has this internal RXC/RXD skew,
eth0 does not.
So this is not a chip-wide constant that can be hardcoded in the driver.
We need a way to distinguish the two MAC instances, which is why this is
described per-port in DTS.
--
Li Zhi
next prev parent reply other threads:[~2026-01-23 3:00 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-09 8:06 [PATCH v1 0/2] net: stmmac: eic7700: fix EIC7700 eth1 RX sampling timing lizhi2
2026-01-09 8:08 ` [PATCH v1 1/2] dt-bindings: ethernet: eswin: add clock sampling control lizhi2
2026-01-09 18:27 ` Andrew Lunn
2026-01-10 18:26 ` Russell King (Oracle)
2026-01-11 4:05 ` Bo Gan
2026-01-12 7:05 ` 李志
2026-01-22 13:27 ` Andrew Lunn
2026-01-22 16:03 ` Russell King (Oracle)
2026-01-27 7:05 ` Min Lin
2026-01-27 13:40 ` Andrew Lunn
2026-01-12 6:00 ` 李志
2026-01-22 13:32 ` Andrew Lunn
2026-01-23 3:00 ` 李志 [this message]
2026-01-23 3:19 ` Andrew Lunn
2026-01-23 7:39 ` Bo Gan
2026-01-23 9:52 ` 李志
2026-01-23 10:07 ` Krzysztof Kozlowski
2026-01-23 10:47 ` Bo Gan
2026-01-23 19:43 ` Andrew Lunn
2026-01-24 4:57 ` Bo Gan
2026-01-26 3:10 ` Min Lin
2026-01-26 18:29 ` Russell King (Oracle)
2026-01-27 6:14 ` Min Lin
2026-01-28 2:38 ` Bo Gan
2026-01-28 5:48 ` Min Lin
2026-02-03 6:06 ` Min Lin
2026-02-03 13:16 ` Andrew Lunn
2026-01-28 10:05 ` Krzysztof Kozlowski
2026-01-29 2:01 ` Bo Gan
2026-01-09 8:09 ` [PATCH v1 2/2] net: stmmac: eic7700: enable clocks before syscon access and correct RX sampling timing lizhi2
2026-01-09 18:31 ` Andrew Lunn
2026-01-12 6:55 ` 李志
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