Re: [PATCH] cxl: read MEMDEV_STATUS register iff the device has it

[Zhi Wang <zhiw@nvidia.com>]

On 12/12/2024 21.30, Dan Williams wrote:
> Zhi Wang wrote:
>> Before accessing the CXL device memory after reset/power-on, the driver
>> needs to ensure the device memory media is ready.
>>
>> However, not every CXL device implements the CXL memory device register
>> groups. E.g. a CXL type-2 device. Thus calling cxl_await_media_ready()
>> on these devcie will lead to a kernel panic. This problem was found when
>> testing the emulated CXL type-2 device without a CXL memory device
>> register.
> 
> Why is a type-2 driver, that should know the device's capabilities like
> missing typical type-3 registers calling cxl_await_media_ready() that
> has type-3 assumptions?
> 
> These feels like a band-aid for a higher level issue, no?

I think the reason that we would like to tweak cxl_await_media_ready() 
to be usable for type-2 is: even a type-2 might not have CXL memory 
device register group for the MEMDEV_STATUS register to justify "media 
ready", the rest parts in cxl_await_media_ready() are still valid for a 
type-2. E.g. MEM_{VALID, ACTIVE} bits in DVSEC_RANGE* registers. A 
type-2 with HDM decoder support shows the "media ready" via those registers.

Z.