From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexander Graf Date: Mon, 16 Jul 2012 14:55:22 +0000 Subject: Re: [PATCH] openpic: Added BRR1 register Message-Id: <50042B5A.5020600@suse.de> List-Id: References: <1342091277-7122-1-git-send-email-Bharat.Bhushan@freescale.com> In-Reply-To: <1342091277-7122-1-git-send-email-Bharat.Bhushan@freescale.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: kvm-ppc@vger.kernel.org On 07/12/2012 01:07 PM, Bharat Bhushan wrote: > Linux mpic driver uses (changes may be in pipeline to get upstreamed soon) > BRR1. This patch adds the support to emulate readonly BRR1. > > Signed-off-by: Bharat Bhushan > --- > hw/openpic.c | 6 ++++++ > 1 files changed, 6 insertions(+), 0 deletions(-) > > diff --git a/hw/openpic.c b/hw/openpic.c > index 58ef871..244155b 100644 > --- a/hw/openpic.c > +++ b/hw/openpic.c > @@ -595,6 +595,8 @@ static void openpic_gbl_write (void *opaque, target_phys_addr_t addr, uint32_t v > if (addr& 0xF) > return; > switch (addr) { > + case 0x00: /* BRR1 Readonly */ > + break; > case 0x40: > case 0x50: > case 0x60: > @@ -671,6 +673,7 @@ static uint32_t openpic_gbl_read (void *opaque, target_phys_addr_t addr) > case 0x1090: /* PINT */ > retval = 0x00000000; > break; > + case 0x00: Add a comment saying what register this is. We really should be using #define's here, but it would be even worse to have it converted only half-way, so just stick with the comment for now. > case 0x40: > case 0x50: > case 0x60: > @@ -893,6 +896,9 @@ static uint32_t openpic_cpu_read_internal(void *opaque, target_phys_addr_t addr, > dst =&opp->dst[idx]; > addr&= 0xFF0; > switch (addr) { > + case 0x00: /* BRR1 */ > + retval = 0x00400200; Please unmagicify this one :) Alex > + break; > case 0x80: /* PCTP */ > retval = dst->pctp; > break;