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Date: Tue, 17 Jul 2012 17:00:36 +0200
From: Wolfgang Grandegger <wg@grandegger.com>
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Subject: Re: [Xenomai] Edge interrupts on PCI drivers
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To: "Jorge Ramirez Ortiz, HCL Europe" <Jorge.Ramirez-Ortiz@hcl.com>
Cc: "xenomai@xenomai.org" <xenomai@xenomai.org>

On 07/17/2012 04:57 PM, Jorge Ramirez Ortiz, HCL Europe wrote:
> Typical PCI devices have many sources of interrupts (some level, some edge triggered) normally all routed through PIN A.

AFAIC, PCI interrupts are *always* level sensitive.

> When writing an RTDM pci driver for one of these devices, how does the microkernel manage the edge interrupts? 
> 
> I am looking at some traces where the CPU seems to be interrupted continuously by an edge interrupt until the actual condition that causes it is cleared.

That's normal for level sensitive interrupt sources.

Wolfgang.