From mboxrd@z Thu Jan 1 00:00:00 1970 Message-ID: <50057E9C.8080508@siemens.com> Date: Tue, 17 Jul 2012 17:02:52 +0200 From: Jan Kiszka MIME-Version: 1.0 References: <4F534D1A615F544D95E57BFD8460658301CBE3D1@GEO-HCLT-UKEVS1.GEO.CORP.HCL.IN> <50057E14.3080904@grandegger.com> In-Reply-To: <50057E14.3080904@grandegger.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Xenomai] Edge interrupts on PCI drivers List-Id: Discussions about the Xenomai project List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Wolfgang Grandegger , "Jorge Ramirez Ortiz, HCL Europe" Cc: "xenomai@xenomai.org" On 2012-07-17 17:00, Wolfgang Grandegger wrote: > On 07/17/2012 04:57 PM, Jorge Ramirez Ortiz, HCL Europe wrote: >> Typical PCI devices have many sources of interrupts (some level, some edge triggered) normally all routed through PIN A. > > AFAIC, PCI interrupts are *always* level sensitive. More precisely, legacy INTx are level triggered, MSI/MSI-X interrupts are edge. About which type are we talking here? Jan -- Siemens AG, Corporate Technology, CT RTC ITP SDP-DE Corporate Competence Center Embedded Linux