Re: [PATCH 2/5] MIPS: lantiq: add helper to set PCI clock delay

[Sergei Shtylyov <sshtylyov@mvista.com>]

Hello.

On 22-07-2012 10:55, John Crispin wrote:

> The PCI core has a register that allows us to set the nanosecond delay of the
> PCI clock lane. This patch adds a helper function to allow setting this value.

> Signed-off-by: John Crispin <blogic@openwrt.org>
[...]

> diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c
> index befbb76..91bb435 100644
> --- a/arch/mips/lantiq/xway/sysctrl.c
> +++ b/arch/mips/lantiq/xway/sysctrl.c
[...]
> @@ -258,6 +262,16 @@ static void clkdev_add_pci(void)
>   	clkdev_add(&clk_ext->cl);
>   }
>
> +/* allow PCI driver to specify the clock delay. This is a 6 bit value */

    WHy make it 'u32' then?

> +void ltq_pci_set_delay(u32 delay)
> +{
> +	u32 val = ltq_cgu_r32(pcicr);
> +
> +	val &= ~(PCI_DLY_MASK << PCI_DLY_SHIFT);
> +	val |= (delay & PCI_DLY_MASK) << PCI_DLY_SHIFT;
> +	ltq_cgu_w32(val, pcicr);
> +}
> +

WBR, Sergei