From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:54040) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SuP6U-0006e8-TW for qemu-devel@nongnu.org; Thu, 26 Jul 2012 10:32:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SuP6T-00044o-Jp for qemu-devel@nongnu.org; Thu, 26 Jul 2012 10:31:50 -0400 Received: from cantor2.suse.de ([195.135.220.15]:47153 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SuP6T-00044c-9G for qemu-devel@nongnu.org; Thu, 26 Jul 2012 10:31:49 -0400 Message-ID: <501154D1.3090207@suse.de> Date: Thu, 26 Jul 2012 16:31:45 +0200 From: =?ISO-8859-1?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1343240323-7402-1-git-send-email-ehabkost@redhat.com> <1343240323-7402-4-git-send-email-ehabkost@redhat.com> <501078B1.8080103@suse.de> <20120726142456.GE27859@shell.eng.rdu.redhat.com> In-Reply-To: <20120726142456.GE27859@shell.eng.rdu.redhat.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [QEMU PATCH 3/3] x86: pc: versioned CPU model names & compatibility aliases List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eduardo Habkost Cc: libvir-list@redhat.com, Jiri Denemark , Anthony Liguori , qemu-devel@nongnu.org, Gleb Natapov Am 26.07.2012 16:24, schrieb Eduardo Habkost: > On Thu, Jul 26, 2012 at 12:52:33AM +0200, Andreas F=E4rber wrote: >> Am 25.07.2012 20:18, schrieb Eduardo Habkost: >>> This adds version number to CPU model names on the "pc-" >>> machine-types, so we can create new models with bug fixes while keepi= ng >>> compatibility when using older machine-types. >>> >>> When naming the existing models, I used the last QEMU version where t= he >>> model was changed (see summary below), but by coincidence every singl= e >>> one was changed on QEMU-1.1. >>> >>> - Conroe, Penryn, Nehalem, Opteron_G1, Opteron_G2, Opteron_G3: >>> added on 0.13, changed on 1.1 >>> - Westmere, SandyBridge, Opteron_G4: added on 1.1 >>> >>> Signed-off-by: Eduardo Habkost >>> --- >>> hw/pc_piix.c | 56 ++++++++++++++++++++++++++= ++++++++++ >>> sysconfigs/target/cpus-x86_64.conf | 18 ++++++------ >>> 2 files changed, 65 insertions(+), 9 deletions(-) >>> >>> diff --git a/hw/pc_piix.c b/hw/pc_piix.c >>> index 0c0096f..ef3840f 100644 >>> --- a/hw/pc_piix.c >>> +++ b/hw/pc_piix.c >>> @@ -349,6 +349,18 @@ static void pc_xen_hvm_init(ram_addr_t ram_size, >>> } >>> #endif >>> =20 >>> +/* CPU aliases for pre-1.2 CPU models */ >>> +#define V1_1_CPU_ALIASES \ >>> + { "Conroe", "Conroe-1.1" }, \ >>> + { "Penryn", "Penryn-1.1" }, \ >>> + { "Nehalem", "Nehalem-1.1" }, \ >>> + { "Westmere", "Westmere-1.1" }, \ >>> + { "SandyBridge", "SandyBridge-1.1" }, \ >>> + { "Opteron_G1", "Opteron_G1-1.1" }, \ >>> + { "Opteron_G2", "Opteron_G2-1.1" }, \ >>> + { "Opteron_G3", "Opteron_G3-1.1" }, \ >>> + { "Opteron_G4", "Opteron_G4-1.1" }, >>> + >>> static QEMUMachine pc_machine_v1_2 =3D { >>> .name =3D "pc-1.2", >>> .alias =3D "pc", >>> @@ -356,6 +368,10 @@ static QEMUMachine pc_machine_v1_2 =3D { >>> .init =3D pc_init_pci, >>> .max_cpus =3D 255, >>> .is_default =3D 1, >>> + .cpu_aliases =3D (CPUModelAlias[]) { >>> + V1_1_CPU_ALIASES >>> + {NULL, NULL}, >>> + }, >>> }; >>> =20 >>> #define PC_COMPAT_1_1 \ >> [...] >>> diff --git a/sysconfigs/target/cpus-x86_64.conf b/sysconfigs/target/c= pus-x86_64.conf >>> index cee0ea9..14c7891 100644 >>> --- a/sysconfigs/target/cpus-x86_64.conf >>> +++ b/sysconfigs/target/cpus-x86_64.conf >>> @@ -1,7 +1,7 @@ >>> # x86 CPU MODELS >>> =20 >>> [cpudef] >>> - name =3D "Conroe" >>> + name =3D "Conroe-1.1" >>> level =3D "2" >>> vendor =3D "GenuineIntel" >>> family =3D "6" >> [snip] >> >> So where are the actual differences between, e.g., Conroe-1.1 and >> Conroe? I'd expect we need either an additional string applying >> parameter presets such as maybe "x2apic=3Doff" or a nested list of >> (property, value) pairs. >=20 > There are no differences yet, until we make updates in the Conroe model= . > If we have to make any change (to fix a bug, for example), we would > create a "Conroe-1.2" CPU model, and make the "pc-1.2" machine-type > alias "Conroe" to "Conroe-1.2" while keeping the older machine-types > using "Conroe-1.1". >=20 >> >> As long as there's no concept for actually modelling versioned CPUs, I >> consider this RFC stage and not worth merging yet... >=20 > What do you mean by "no concept for actually modelling versioned CPUs"? > You mean there's no use-case or reason for versioning them, or that the > series don't model the versioning properly? I mean, you add infrastructure for remapping Conroe to Conroe-1.1 or Conroe-x.y, but I am missing something that lets us declare "Conroe-1.1 is Conroe-1.2 with this difference", like we do for machines. We surely don't want to duplicate everything that stays the same for each new CPU version. Andreas --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg