From: "Steven J. Hill" <sjhill@realitydiluted.com>
To: JoeJ <tttechmail@gmail.com>
Cc: linux-mips@linux-mips.org
Subject: Re: SMVP Support on MIPS34KC (linux-2.6.35)
Date: Mon, 30 Jul 2012 09:52:23 -0500 [thread overview]
Message-ID: <50169FA7.8010603@realitydiluted.com> (raw)
In-Reply-To: <34230427.post@talk.nabble.com>
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On 07/30/2012 08:20 AM, JoeJ wrote:
>
> Synchronize counters across 2 CPUs: done. NET: Registered protocol family
> 16 bio: create slab <bio-0> at 0 Switching to clocksource MIPS
>
>
> As mentioned in my previous post, even with 3.4.2 kernel, the control
> loops in stop_machine_cpu_stop function. Do you suspect anything here? btw,
> if we set "clocksource=jiffies" in the bootargs, the system boot goes fine.
> The issue is observed only during switching from default clocksource to
> MIPS clocksource. Also, the boot works fine with 'nosmp=1' option & MIPS
> clocksource.
>
Make user that you select both CONFIG_CSRC_R4K ad CONFIG_CSRC_GIC for your
clock sources. The GIC counter will be used from synchronization across the
CPUs. Secondly, the hang is not actually a hard hang. Wait 50 seconds and I
bet you will see the boot complete.
- -Steve
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next prev parent reply other threads:[~2012-07-30 14:52 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <34219711.post@talk.nabble.com>
2012-07-27 17:19 ` SMVP Support on MIPS34KC (linux-2.6.35) Steven J. Hill
2012-07-30 13:20 ` JoeJ
2012-07-30 14:52 ` Steven J. Hill [this message]
2012-07-30 15:28 ` Jeffin
2012-07-30 21:02 ` Steven J. Hill
2012-08-02 13:44 ` JoeJ
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