From: Alex Shi <alex.shi@intel.com>
To: Borislav Petkov <bp@amd64.org>
Cc: "H. Peter Anvin" <hpa@zytor.com>, X86-ML <x86@kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
Borislav Petkov <borislav.petkov@amd.com>
Subject: Re: [PATCH 1/4] x86, CPU: Fixup tlb_flushall_shift formatting
Date: Mon, 06 Aug 2012 10:37:29 +0800 [thread overview]
Message-ID: <501F2DE9.3090900@intel.com> (raw)
In-Reply-To: <1344011869-21868-2-git-send-email-bp@amd64.org>
On 08/04/2012 12:37 AM, Borislav Petkov wrote:
> From: Borislav Petkov <borislav.petkov@amd.com>
>
> The TLB characteristics appeared like this in dmesg:
>
> [ 0.065817] Last level iTLB entries: 4KB 512, 2MB 1024, 4MB 512
> [ 0.065817] Last level dTLB entries: 4KB 1024, 2MB 1024, 4MB 512
> [ 0.065817] tlb_flushall_shift is 0xffffffff
>
> where tlb_flushall_shift is actually -1 but dumped as a hex number.
> However, the Kconfig option CONFIG_DEBUG_TLBFLUSH and the rest of the
> code treats this as a signed decimal and states "If you set it to -1,
> the code flushes the whole TLB unconditionally."
>
> So, fix its formatting in accordance with the other references to it.
>
> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Acked-by Alex Shi <alex.shi@intel.com>
next prev parent reply other threads:[~2012-08-06 2:37 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-03 16:37 [PATCH 0/4] x86, CPU: TLB flushall shift, the AMD side Borislav Petkov
2012-08-03 16:37 ` [PATCH 1/4] x86, CPU: Fixup tlb_flushall_shift formatting Borislav Petkov
2012-08-06 2:37 ` Alex Shi [this message]
2012-08-03 16:37 ` [PATCH 2/4] x86, CPU: Extend TLB size detection for AMD Borislav Petkov
2012-08-03 18:32 ` H. Peter Anvin
2012-08-06 15:39 ` Borislav Petkov
2012-08-03 16:37 ` [PATCH 3/4] x86, CPU: Add AMD TLB size detection Borislav Petkov
2012-08-03 16:37 ` [PATCH 4/4] x86, CPU: Preset default tlb_flushall_shift on AMD Borislav Petkov
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