From: Igor Mitsyanko <i.mitsyanko@samsung.com>
To: "Peter A. G. Crosthwaite" <peter.crosthwaite@petalogix.com>
Cc: peter.maydell@linaro.org, stefanha@gmail.com,
qemu-devel@nongnu.org, paul@codesourcery.com,
edgar.iglesias@gmail.com, john.williams@petalogix.com
Subject: Re: [Qemu-devel] [PATCH v5 09/15] hw: Added generic FIFO API.
Date: Mon, 06 Aug 2012 13:40:22 +0400 [thread overview]
Message-ID: <501F9106.9080903@samsung.com> (raw)
In-Reply-To: <81b9e406e0b0292ccd3168385ab6a73a78a0ada5.1344218410.git.peter.crosthwaite@petalogix.com>
On 08/06/2012 06:16 AM, Peter A. G. Crosthwaite wrote:
> Added a FIFO API that can be used to create and operate byte FIFOs.
>
> Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
> ---
> hw/Makefile.objs | 1 +
> hw/fifo.c | 79 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
> hw/fifo.h | 47 ++++++++++++++++++++++++++++++++
> 3 files changed, 127 insertions(+), 0 deletions(-)
> create mode 100644 hw/fifo.c
> create mode 100644 hw/fifo.h
>
> diff --git a/hw/Makefile.objs b/hw/Makefile.objs
> index 8327e55..6ba570e 100644
> --- a/hw/Makefile.objs
> +++ b/hw/Makefile.objs
> @@ -15,6 +15,7 @@ hw-obj-$(CONFIG_ECC) += ecc.o
> hw-obj-$(CONFIG_NAND) += nand.o
> hw-obj-$(CONFIG_PFLASH_CFI01) += pflash_cfi01.o
> hw-obj-$(CONFIG_PFLASH_CFI02) += pflash_cfi02.o
> +hw-obj-y += fifo.o
Perhaps it'd be better to make it common object and put it into root
directory, like its done for bitops.c and bitmap.c
>
> hw-obj-$(CONFIG_M48T59) += m48t59.o
> hw-obj-$(CONFIG_ESCC) += escc.o
> diff --git a/hw/fifo.c b/hw/fifo.c
> new file mode 100644
> index 0000000..5e14e1e
> --- /dev/null
> +++ b/hw/fifo.c
> @@ -0,0 +1,79 @@
> +/*
> + * Generic FIFO component, implemented as a circular buffer.
> + *
> + * Copyright (c) 2012 Peter A. G. Crosthwaite
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version
> + * 2 of the License, or (at your option) any later version.
> + *
> + * You should have received a copy of the GNU General Public License along
> + * with this program; if not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#include "fifo.h"
> +
> +void fifo8_create(Fifo8 *fifo, uint32_t capacity)
> +{
> + fifo->data = g_new(uint8_t, capacity);
> + fifo->capacity = capacity;
> + fifo->head = 0;
> + fifo->num = 0;
> +}
> +
> +void fifo8_destroy(Fifo8 *fifo)
> +{
> + g_free(fifo->data);
> +}
> +
> +void fifo8_push(Fifo8 *fifo, uint8_t data)
> +{
> + if (fifo->num == fifo->capacity) {
> + abort();
> + }
I think its too harsh to abort here (and in pop() too), fifo
overrun/underrun condition is absolutely normal for most of the devices,
usually it would just trigger an interrupt. I suggest return a error
code instead and let a caller decide what should happen in this situation.
> + fifo->data[(fifo->head + fifo->num) % fifo->capacity] = data;
> + fifo->num++;
> +}
> +
> +uint8_t fifo8_pop(Fifo8 *fifo)
> +{
> + uint8_t ret;
> +
> + if (fifo->num == 0) {
> + abort();
> + }
> + ret = fifo->data[fifo->head++];
> + fifo->head %= fifo->capacity;
> + fifo->num--;
> + return ret;
> +}
> +
> +void fifo8_reset(Fifo8 *fifo)
> +{
> + fifo->num = 0;
> +}
> +
> +bool fifo8_is_empty(Fifo8 *fifo)
> +{
> + return (fifo->num == 0);
> +}
> +
> +bool fifo8_is_full(Fifo8 *fifo)
> +{
> + return (fifo->num == fifo->capacity);
> +}
> +
> +const VMStateDescription vmstate_fifo8 = {
> + .name = "SSISlave",
thats not a good name for a generic fifo)
> + .version_id = 1,
> + .minimum_version_id = 1,
> + .minimum_version_id_old = 1,
> + .fields = (VMStateField[]) {
too much spaces here
> + VMSTATE_VBUFFER_UINT32(data, Fifo8, 1, NULL, 0, capacity),
> + VMSTATE_UINT32(head, Fifo8),
> + VMSTATE_UINT32(num, Fifo8),
> + VMSTATE_END_OF_LIST()
> + }
> +};
> +
> diff --git a/hw/fifo.h b/hw/fifo.h
> new file mode 100644
> index 0000000..3fb09ff
> --- /dev/null
> +++ b/hw/fifo.h
> @@ -0,0 +1,47 @@
> +#ifndef FIFO_H
> +#define FIFO_H
> +
> +#include "hw.h"
> +
> +typedef struct {
> + /* All fields are private */
> + uint8_t *data;
> + uint32_t capacity;
> + uint32_t head;
> + uint32_t num;
> +} Fifo8;
> +
> +/* create a fifo of the specified size */
> +
> +void fifo8_create(Fifo8 *, uint32_t);
> +
> +/* cleanup a fifo */
> +
> +void fifo8_destroy(Fifo8 *);
> +
> +/* push a data byte to the fifo. Behaviour is undefined if the fifo is full */
> +
> +void fifo8_push(Fifo8 *, uint8_t);
> +
> +/* pop a data byte from the fifo. Behviour is undefined if the fifo is empty */
> +
> +uint8_t fifo8_pop(Fifo8 *);
> +
> +/* reset (empty) the fifo */
> +
> +void fifo8_reset(Fifo8 *);
> +
> +bool fifo8_is_empty(Fifo8 *);
> +bool fifo8_is_full(Fifo8 *);
> +
> +extern const VMStateDescription vmstate_fifo8;
> +
> +#define VMSTATE_FIFO8(_field, _state) { \
> + .name = (stringify(_field)), \
> + .size = sizeof(Fifo8), \
> + .vmsd = &vmstate_fifo8, \
> + .flags = VMS_STRUCT, \
> + .offset = vmstate_offset_value(_state, _field, Fifo8), \
> +}
> +
> +#endif /* FIFO_H */
next prev parent reply other threads:[~2012-08-06 9:40 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-06 2:16 [Qemu-devel] [PATCH v5 00/15] Ehnahced SSI bus support + M25P80 SPI flash + Xilinx SPI controller Peter A. G. Crosthwaite
2012-08-06 2:16 ` [Qemu-devel] [PATCH v5 01/15] ssi: Support for multiple attached devices Peter A. G. Crosthwaite
2012-08-06 2:16 ` [Qemu-devel] [PATCH v5 02/15] ssi: Added VMSD stub Peter A. G. Crosthwaite
2012-08-06 9:13 ` Peter Maydell
2012-08-06 9:15 ` Peter Maydell
2012-08-10 4:19 ` Peter Crosthwaite
2012-08-06 2:16 ` [Qemu-devel] [PATCH v5 03/15] ssi: Implemented CS behaviour Peter A. G. Crosthwaite
2012-08-06 9:25 ` Peter Maydell
2012-08-07 5:17 ` Peter Crosthwaite
2012-08-06 2:16 ` [Qemu-devel] [PATCH v5 04/15] ssi: Added create_slave_no_init() Peter A. G. Crosthwaite
2012-08-06 9:29 ` Peter Maydell
2012-08-07 0:04 ` Peter Crosthwaite
2012-08-06 2:16 ` [Qemu-devel] [PATCH v5 05/15] qdev: allow multiple qdev_init_gpio_in() calls Peter A. G. Crosthwaite
2012-08-06 9:38 ` Peter Maydell
2012-08-07 0:12 ` Peter Crosthwaite
2012-08-07 8:03 ` Peter Maydell
2012-08-06 2:16 ` [Qemu-devel] [PATCH v5 06/15] hw/stellaris: Removed gpio_out init array Peter A. G. Crosthwaite
2012-08-06 2:16 ` [Qemu-devel] [PATCH v5 07/15] stellaris: Removed SSI mux Peter A. G. Crosthwaite
2012-08-06 2:16 ` [Qemu-devel] [PATCH v5 08/15] ssd0323: abort() instead of exit(1) on error Peter A. G. Crosthwaite
2012-08-06 9:41 ` Peter Maydell
2012-08-10 23:31 ` Peter Crosthwaite
2012-08-11 19:01 ` Peter Maydell
2012-08-06 2:16 ` [Qemu-devel] [PATCH v5 09/15] hw: Added generic FIFO API Peter A. G. Crosthwaite
2012-08-06 9:40 ` Igor Mitsyanko [this message]
2012-08-06 9:48 ` Peter Maydell
2012-08-06 12:42 ` Igor Mitsyanko
2012-08-07 6:05 ` Peter Crosthwaite
2012-08-06 9:52 ` Igor Mitsyanko
2012-08-07 6:10 ` Peter Crosthwaite
2012-08-07 6:28 ` Igor Mitsyanko
2012-08-07 6:42 ` Peter Crosthwaite
2012-08-06 2:16 ` [Qemu-devel] [PATCH v5 10/15] m25p80: Initial implementation of SPI flash device Peter A. G. Crosthwaite
2012-08-06 2:16 ` [Qemu-devel] [PATCH v5 11/15] xilinx_spi: Initial impl. of Xilinx SPI controller Peter A. G. Crosthwaite
2012-08-06 2:16 ` [Qemu-devel] [PATCH v5 12/15] petalogix-ml605: added SPI controller with n25q128 Peter A. G. Crosthwaite
2012-08-06 9:50 ` Peter Maydell
2012-08-07 5:24 ` Peter Crosthwaite
2012-08-06 2:16 ` [Qemu-devel] [PATCH v5 13/15] xilinx_spips: Xilinx Zynq SPI cntrlr device model Peter A. G. Crosthwaite
2012-08-06 2:16 ` [Qemu-devel] [PATCH v5 14/15] xilinx_zynq: Added SPI controllers + flashes Peter A. G. Crosthwaite
2012-08-06 2:16 ` [Qemu-devel] [PATCH v5 15/15] MAINTAINERS: Added maintainerships for SSI Peter A. G. Crosthwaite
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