From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Wed, 22 Aug 2012 09:32:13 +0200 Subject: [U-Boot] [PATCH v2 1/2] mx35: Define default SoC input clock frequencies In-Reply-To: <1229734407.2662896.1345583240015.JavaMail.root@advansee.com> References: <1229734407.2662896.1345583240015.JavaMail.root@advansee.com> Message-ID: <50348AFD.4060800@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 21/08/2012 23:07, Beno?t Th?baudeau wrote: > Define default SoC input clock frequencies for i.MX35 in order to get rid of > duplicated definitions. > > Signed-off-by: Beno?t Th?baudeau > Cc: Stefano Babic > --- > This patch depends on http://patchwork.ozlabs.org/patch/177437/ . > > Changes for v2: > - New patch. > > .../arch/arm/cpu/arm1136/mx35/generic.c | 43 ++++++++------------ > .../arch/arm/cpu/arm1136/mx35/timer.c | 2 +- > .../arch/arm/include/asm/arch-mx35/clock.h | 14 +++++++ > .../include/configs/flea3.h | 1 - > .../include/configs/mx35pdk.h | 1 - > 5 files changed, 31 insertions(+), 30 deletions(-) > > diff --git u-boot-imx-88e73dd.orig/arch/arm/cpu/arm1136/mx35/generic.c u-boot-imx-88e73dd/arch/arm/cpu/arm1136/mx35/generic.c > index 8f61069..04c8341 100644 > --- u-boot-imx-88e73dd.orig/arch/arm/cpu/arm1136/mx35/generic.c > +++ u-boot-imx-88e73dd/arch/arm/cpu/arm1136/mx35/generic.c > @@ -149,9 +149,7 @@ static u32 get_mcu_main_clk(void) > struct ccm_regs *ccm = > (struct ccm_regs *)IMX_CCM_BASE; > arm_div = get_arm_div(readl(&ccm->pdr0), &fi, &fd); > - fi *= > - decode_pll(readl(&ccm->mpctl), > - CONFIG_MX35_HCLK_FREQ); > + fi *= decode_pll(readl(&ccm->mpctl), MXC_HCLK); > return fi / (arm_div * fd); > } > > @@ -193,12 +191,10 @@ u32 imx_get_uartclk(void) > (struct ccm_regs *)IMX_CCM_BASE; > u32 pdr4 = readl(&ccm->pdr4); > > - if (readl(&ccm->pdr3) & MXC_CCM_PDR3_UART_M_U) { > + if (readl(&ccm->pdr3) & MXC_CCM_PDR3_UART_M_U) > freq = get_mcu_main_clk(); > - } else { > - freq = decode_pll(readl(&ccm->ppctl), > - CONFIG_MX35_HCLK_FREQ); > - } > + else > + freq = decode_pll(readl(&ccm->ppctl), MXC_HCLK); > freq /= CCM_GET_DIVIDER(pdr4, > MXC_CCM_PDR4_UART_PODF_MASK, > MXC_CCM_PDR4_UART_PODF_OFFSET) + 1; > @@ -253,12 +249,10 @@ unsigned int mxc_get_main_clock(enum mxc_main_clock clk) > break; > case USB_CLK: > usb_podf = (reg4 >> 22) & 0x3F; > - if (reg4 & 0x200) { > + if (reg4 & 0x200) > pll = get_mcu_main_clk(); > - } else { > - pll = decode_pll(readl(&ccm->ppctl), > - CONFIG_MX35_HCLK_FREQ); > - } > + else > + pll = decode_pll(readl(&ccm->ppctl), MXC_HCLK); > > ret_val = pll / (usb_podf + 1); > break; > @@ -285,15 +279,14 @@ unsigned int mxc_get_peri_clock(enum mxc_peri_clock clk) > clk_sel = mpdr3 & (1 << 14); > pdf = (mpdr4 >> 10) & 0x3F; > ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) : > - decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) / > - (pdf + 1); > + decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1); > break; > case SSI1_BAUD: > pre_pdf = (mpdr2 >> 24) & 0x7; > pdf = mpdr2 & 0x3F; > clk_sel = mpdr2 & (1 << 6); > ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) : > - decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) / > + decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / > ((pre_pdf + 1) * (pdf + 1)); > break; > case SSI2_BAUD: > @@ -301,15 +294,14 @@ unsigned int mxc_get_peri_clock(enum mxc_peri_clock clk) > pdf = (mpdr2 >> 8) & 0x3F; > clk_sel = mpdr2 & (1 << 6); > ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) : > - decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) / > + decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / > ((pre_pdf + 1) * (pdf + 1)); > break; > case CSI_BAUD: > clk_sel = mpdr2 & (1 << 7); > pdf = (mpdr2 >> 16) & 0x3F; > ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) : > - decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) / > - (pdf + 1); > + decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1); > break; > case MSHC_CLK: > pre_pdf = readl(&ccm->pdr1); > @@ -317,36 +309,33 @@ unsigned int mxc_get_peri_clock(enum mxc_peri_clock clk) > pdf = (pre_pdf >> 22) & 0x3F; > pre_pdf = (pre_pdf >> 28) & 0x7; > ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) : > - decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) / > + decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / > ((pre_pdf + 1) * (pdf + 1)); > break; > case ESDHC1_CLK: > clk_sel = mpdr3 & 0x40; > pdf = mpdr3 & 0x3F; > ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) : > - decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) / > - (pdf + 1); > + decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1); > break; > case ESDHC2_CLK: > clk_sel = mpdr3 & 0x40; > pdf = (mpdr3 >> 8) & 0x3F; > ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) : > - decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) / > - (pdf + 1); > + decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1); > break; > case ESDHC3_CLK: > clk_sel = mpdr3 & 0x40; > pdf = (mpdr3 >> 16) & 0x3F; > ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) : > - decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) / > - (pdf + 1); > + decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1); > break; > case SPDIF_CLK: > clk_sel = mpdr3 & 0x400000; > pre_pdf = (mpdr3 >> 29) & 0x7; > pdf = (mpdr3 >> 23) & 0x3F; > ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) : > - decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) / > + decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / > ((pre_pdf + 1) * (pdf + 1)); > break; > default: > diff --git u-boot-imx-88e73dd.orig/arch/arm/cpu/arm1136/mx35/timer.c u-boot-imx-88e73dd/arch/arm/cpu/arm1136/mx35/timer.c > index 04937a1..6000042 100644 > --- u-boot-imx-88e73dd.orig/arch/arm/cpu/arm1136/mx35/timer.c > +++ u-boot-imx-88e73dd/arch/arm/cpu/arm1136/mx35/timer.c > @@ -101,7 +101,7 @@ ulong get_timer_masked(void) > { > /* > * get_ticks() returns a long long (64 bit), it wraps in > - * 2^64 / CONFIG_MX25_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~ > + * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~ > * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in > * 5 * 10^6 days - long enough. > */ > diff --git u-boot-imx-88e73dd.orig/arch/arm/include/asm/arch-mx35/clock.h u-boot-imx-88e73dd/arch/arm/include/asm/arch-mx35/clock.h > index 0575dad..60285df 100644 > --- u-boot-imx-88e73dd.orig/arch/arm/include/asm/arch-mx35/clock.h > +++ u-boot-imx-88e73dd/arch/arm/include/asm/arch-mx35/clock.h > @@ -24,6 +24,20 @@ > #ifndef __ASM_ARCH_CLOCK_H > #define __ASM_ARCH_CLOCK_H > > +#include > + > +#ifdef CONFIG_MX35_HCLK_FREQ > +#define MXC_HCLK CONFIG_MX35_HCLK_FREQ > +#else > +#define MXC_HCLK 24000000 > +#endif > + > +#ifdef CONFIG_MX35_CLK32 > +#define MXC_CLK32 CONFIG_MX35_CLK32 > +#else > +#define MXC_CLK32 32768 > +#endif > + > enum mxc_clock { > MXC_ARM_CLK, > MXC_AHB_CLK, > diff --git u-boot-imx-88e73dd.orig/include/configs/flea3.h u-boot-imx-88e73dd/include/configs/flea3.h > index e8e3c6a..815e2c5 100644 > --- u-boot-imx-88e73dd.orig/include/configs/flea3.h > +++ u-boot-imx-88e73dd/include/configs/flea3.h > @@ -31,7 +31,6 @@ > /* High Level Configuration Options */ > #define CONFIG_ARM1136 /* This is an arm1136 CPU core */ > #define CONFIG_MX35 > -#define CONFIG_MX35_HCLK_FREQ 24000000 > > #define CONFIG_SYS_DCACHE_OFF > #define CONFIG_SYS_CACHELINE_SIZE 32 > diff --git u-boot-imx-88e73dd.orig/include/configs/mx35pdk.h u-boot-imx-88e73dd/include/configs/mx35pdk.h > index f930ed0..751a1e3 100644 > --- u-boot-imx-88e73dd.orig/include/configs/mx35pdk.h > +++ u-boot-imx-88e73dd/include/configs/mx35pdk.h > @@ -31,7 +31,6 @@ > /* High Level Configuration Options */ > #define CONFIG_ARM1136 /* This is an arm1136 CPU core */ > #define CONFIG_MX35 > -#define CONFIG_MX35_HCLK_FREQ 24000000 > > #define CONFIG_DISPLAY_CPUINFO > > Nice clean-up Acked-by: Stefano Babic Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================