From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?ISO-8859-1?Q?Antti_Koskip=E4=E4?= Subject: Re: [PATCH 1/2] drm/i915: Add ERR_INT to gen7 error state Date: Wed, 22 Aug 2012 15:54:45 +0300 Message-ID: <5034D695.2000007@linux.intel.com> References: <1345504514-13159-1-git-send-email-ben@bwidawsk.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 375EA9F0FB for ; Wed, 22 Aug 2012 05:54:45 -0700 (PDT) In-Reply-To: <1345504514-13159-1-git-send-email-ben@bwidawsk.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org Both patches look ok. Reviewed-by: Antti Koskipaa On 08/21/12 02:15, Ben Widawsky wrote: > ERR_INT can generate interrupts. However since most of the conditions seem > quite fatal the patch opts to simply report it in error state instead of > adding more complexity to the interrupt handler for little gain (the > bits are sticky anyway). > > Signed-off-by: Ben Widawsky > --- > drivers/gpu/drm/i915/i915_debugfs.c | 3 +++ > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/i915_irq.c | 3 +++ > drivers/gpu/drm/i915/i915_reg.h | 1 + > 4 files changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index 0e8f14d..02405c7 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -702,6 +702,9 @@ static int i915_error_state(struct seq_file *m, void *unused) > seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg); > } > > + if (INTEL_INFO(dev)->gen == 7) > + seq_printf(m, "ERR_INT: 0x%08x\n", error->err_int); > + > for_each_ring(ring, dev_priv, i) > i915_ring_error_state(m, dev, error, i); > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 33f19eb..c61fc48 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -196,6 +196,7 @@ struct drm_i915_error_state { > u32 cpu_ring_head[I915_NUM_RINGS]; > u32 cpu_ring_tail[I915_NUM_RINGS]; > u32 error; /* gen6+ */ > + u32 err_int; /* gen7 */ > u32 instpm[I915_NUM_RINGS]; > u32 instps[I915_NUM_RINGS]; > u32 instdone1; > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 0c37101..021207c 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -1211,6 +1211,9 @@ static void i915_capture_error_state(struct drm_device *dev) > error->done_reg = I915_READ(DONE_REG); > } > > + if (INTEL_INFO(dev)->gen == 7) > + error->err_int = I915_READ(GEN7_ERR_INT); > + > i915_gem_record_fences(dev, error); > i915_gem_record_rings(dev, error); > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 2f7b688..d4a7d73 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -507,6 +507,7 @@ > #define DMA_FADD_I8XX 0x020d0 > > #define ERROR_GEN6 0x040a0 > +#define GEN7_ERR_INT 0x44040 > > /* GM45+ chicken bits -- debug workaround bits that may be required > * for various sorts of correct behavior. The top 16 bits of each are