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diff for duplicates of <503D4FFC.9010706@samsung.com>

diff --git a/a/1.txt b/N1/1.txt
index dd80476..3ebd147 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -42,7 +42,7 @@ On 08/28/12 13:58, Sylwester Nawrocki wrote:
 > CAMCLK_SEL   | [4]   | 0 : Use CAMCLK with UPLL output(CAMCLK=UPLL output)
 >               |       | 1 : CAMCLK is divided by CAMCLK_DIV value
 > -------------+-------+----------------------------------------------------
-> CAMCLK_DIV   | [3:0] | CAMCLK divide factor setting register(0 – 15).
+> CAMCLK_DIV   | [3:0] | CAMCLK divide factor setting register(0 ? 15).
 >               |       | Camera clock = UPLL / [(CAMCLK_DIV +1)x2].
 >               |       | This bit is valid when CAMCLK_SEL=1.
 >
diff --git a/a/content_digest b/N1/content_digest
index 53d1954..f5002f5 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,13 +1,10 @@
  "ref\01346098329-32059-1-git-send-email-sylvester.nawrocki@gmail.com\0"
  "ref\0503BFB86.20607@samsung.com\0"
  "ref\0503D3108.1030804@gmail.com\0"
- "From\0Kukjin Kim <kgene.kim@samsung.com>\0"
- "Subject\0Re: [PATCH] ARM: S3C24XX: Add .get_rate callback for \"camif-upll\" clock\0"
+ "From\0kgene.kim@samsung.com (Kukjin Kim)\0"
+ "Subject\0[PATCH] ARM: S3C24XX: Add .get_rate callback for \"camif-upll\" clock\0"
  "Date\0Tue, 28 Aug 2012 16:10:52 -0700\0"
- "To\0Sylwester Nawrocki <sylvester.nawrocki@gmail.com>\0"
- "Cc\0Kukjin Kim <kgene.kim@samsung.com>"
-  linux-samsung-soc@vger.kernel.org
- " linux-arm-kernel@lists.infradead.org\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On 08/28/12 13:58, Sylwester Nawrocki wrote:\n"
@@ -54,7 +51,7 @@
  "> CAMCLK_SEL   | [4]   | 0 : Use CAMCLK with UPLL output(CAMCLK=UPLL output)\n"
  ">               |       | 1 : CAMCLK is divided by CAMCLK_DIV value\n"
  "> -------------+-------+----------------------------------------------------\n"
- "> CAMCLK_DIV   | [3:0] | CAMCLK divide factor setting register(0 \342\200\223 15).\n"
+ "> CAMCLK_DIV   | [3:0] | CAMCLK divide factor setting register(0 ? 15).\n"
  ">               |       | Camera clock = UPLL / [(CAMCLK_DIV +1)x2].\n"
  ">               |       | This bit is valid when CAMCLK_SEL=1.\n"
  ">\n"
@@ -88,4 +85,4 @@
  "Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,\n"
  SW Solution Development Team, Samsung Electronics Co., Ltd.
 
-7a7a4377ec519afb751014106370d0fa1537a09e2f2fcbd96f242762daf8c6a1
+9ee9a24ccd56b87787525fc9d69c52c2aff0c84b1aea2243a0d35c31a4d04f59

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