diff for duplicates of <5044C2DD.5000705@ti.com> diff --git a/a/1.txt b/N1/1.txt index 6b7e8ac..cd88dc1 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -6,7 +6,7 @@ On 08/29/2012 03:31 PM, Peter Ujfalusi wrote: > The McBSP IP within OMAP2420 and 2430 is different we need to create separate > dtsi files for them. > -> Signed-off-by: Peter Ujfalusi <peter.ujfalusi-l0cyMroinI0@public.gmane.org> +> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> > --- > arch/arm/boot/dts/omap2420.dtsi | 39 ++++++++++++++++++ > arch/arm/boot/dts/omap2430.dtsi | 83 +++++++++++++++++++++++++++++++++++++++ @@ -39,7 +39,7 @@ Nit: 2012 > + compatible = "ti,omap2420", "ti,omap2"; > + > + ocp { -> + mcbsp1: mcbsp@48074000 { +> + mcbsp1: mcbsp at 48074000 { > + compatible = "ti,omap2420-mcbsp"; > + reg = <0x48074000 0xff>; > + reg-names = "mpu"; @@ -49,7 +49,7 @@ Nit: 2012 That one is not correct because it does comply with the interrupt controller specifier that require only one cell: - intc: interrupt-controller@48200000 { + intc: interrupt-controller at 48200000 { compatible = "ti,omap2-intc"; interrupt-controller; #interrupt-cells = <1>; @@ -72,7 +72,7 @@ That comment is applicable for OMAP2420, OMAP2430, and OMAP3 in general. > + ti,hwmods = "mcbsp1"; > + }; > + -> + mcbsp2: mcbsp@48076000 { +> + mcbsp2: mcbsp at 48076000 { > + compatible = "ti,omap2420-mcbsp"; > + reg = <0x48076000 0xff>; > + reg-names = "mpu"; diff --git a/a/content_digest b/N1/content_digest index dcad315..712a4c6 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,13 +1,9 @@ "ref\01346247067-9632-1-git-send-email-peter.ujfalusi@ti.com\0" "ref\01346247067-9632-2-git-send-email-peter.ujfalusi@ti.com\0" - "ref\01346247067-9632-2-git-send-email-peter.ujfalusi-l0cyMroinI0@public.gmane.org\0" - "From\0Benoit Cousson <b-cousson-l0cyMroinI0@public.gmane.org>\0" - "Subject\0Re: [PATCH v2 1/8] ARM/dts: OMAP2: Add McBSP entries for OMAP2420 and OMAP2430 SoC\0" + "From\0b-cousson@ti.com (Benoit Cousson)\0" + "Subject\0[PATCH v2 1/8] ARM/dts: OMAP2: Add McBSP entries for OMAP2420 and OMAP2430 SoC\0" "Date\0Mon, 3 Sep 2012 16:46:53 +0200\0" - "To\0Peter Ujfalusi <peter.ujfalusi-l0cyMroinI0@public.gmane.org>\0" - "Cc\0devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org" - linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Hi Peter,\n" @@ -18,7 +14,7 @@ "> The McBSP IP within OMAP2420 and 2430 is different we need to create separate\n" "> dtsi files for them.\n" "> \n" - "> Signed-off-by: Peter Ujfalusi <peter.ujfalusi-l0cyMroinI0@public.gmane.org>\n" + "> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>\n" "> ---\n" "> arch/arm/boot/dts/omap2420.dtsi | 39 ++++++++++++++++++\n" "> arch/arm/boot/dts/omap2430.dtsi | 83 +++++++++++++++++++++++++++++++++++++++\n" @@ -51,7 +47,7 @@ "> +\tcompatible = \"ti,omap2420\", \"ti,omap2\";\n" "> +\n" "> +\tocp {\n" - "> +\t\tmcbsp1: mcbsp@48074000 {\n" + "> +\t\tmcbsp1: mcbsp at 48074000 {\n" "> +\t\t\tcompatible = \"ti,omap2420-mcbsp\";\n" "> +\t\t\treg = <0x48074000 0xff>;\n" "> +\t\t\treg-names = \"mpu\";\n" @@ -61,7 +57,7 @@ "That one is not correct because it does comply with the interrupt\n" "controller specifier that require only one cell:\n" "\n" - "\t\tintc: interrupt-controller@48200000 {\n" + "\t\tintc: interrupt-controller at 48200000 {\n" "\t\t\tcompatible = \"ti,omap2-intc\";\n" "\t\t\tinterrupt-controller;\n" "\t\t\t#interrupt-cells = <1>;\n" @@ -84,7 +80,7 @@ "> +\t\t\tti,hwmods = \"mcbsp1\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tmcbsp2: mcbsp@48076000 {\n" + "> +\t\tmcbsp2: mcbsp at 48076000 {\n" "> +\t\t\tcompatible = \"ti,omap2420-mcbsp\";\n" "> +\t\t\treg = <0x48076000 0xff>;\n" "> +\t\t\treg-names = \"mpu\";\n" @@ -112,4 +108,4 @@ "Regards,\n" Benoit -c98bd1ec64048d8a012f6a18277537a720c72cb65e7492fd06a697d9924d46f9 +51162dbeb7292c8b4e139f283cd80002e7b747028bd4d0487edb26821651744d
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