From: "H. Peter Anvin" <hpa@zytor.com>
To: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: mingo@kernel.org, torvalds@linux-foundation.org,
andreas.herrmann3@amd.com, bp@amd64.org, robert.richter@amd.com,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] x86, fpu: decouple non-lazy/eager fpu restore from xsave
Date: Fri, 07 Sep 2012 11:47:42 -0700 [thread overview]
Message-ID: <504A414E.40507@zytor.com> (raw)
In-Reply-To: <1347042703-11128-1-git-send-email-suresh.b.siddha@intel.com>
On 09/07/2012 11:31 AM, Suresh Siddha wrote:
>
> +static inline void fx_finit(struct i387_fxsave_struct *fx)
> +{
> + memset(fx, 0, xstate_size);
> + fx->cwd = 0x37f;
> + if (cpu_has_xmm)
> + fx->mxcsr = MXCSR_DEFAULT;
> +}
> +
Incidentally, Al Viro asked a very good question the other day, which is
why can't we just set mxcsr unconditionally here? I don't think any
CPUs with FXSAVE and no MXCSR (Pentium II from Intel,
Crusoe/TM-3xxx/5xxx from Transmeta, and presumably some of the K6
generation from AMD) ever looked at this field.
-hpa
--
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel. I don't speak on their behalf.
next prev parent reply other threads:[~2012-09-07 18:47 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-07 18:31 [PATCH 1/3] x86, fpu: decouple non-lazy/eager fpu restore from xsave Suresh Siddha
2012-09-07 18:31 ` [PATCH 2/3] x86, fpu: enable eagerfpu by default for xsaveopt Suresh Siddha
2012-09-07 18:43 ` H. Peter Anvin
2012-09-07 19:20 ` Suresh Siddha
2012-09-07 18:31 ` [PATCH 3/3] x86, fpu: move check_fpu() after alternative_instructions() Suresh Siddha
2012-09-07 18:47 ` H. Peter Anvin [this message]
2012-09-07 19:12 ` [PATCH 1/3] x86, fpu: decouple non-lazy/eager fpu restore from xsave Suresh Siddha
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