diff for duplicates of <504ED7EE.5050103@nvidia.com> diff --git a/a/1.txt b/N1/1.txt index c7d3461..13369b8 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,13 +1,13 @@ On Tuesday 11 September 2012 04:42 AM, Stephen Warren wrote: -> From: Stephen Warren<swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> From: Stephen Warren<swarren@nvidia.com> > > 32-bit math isn't enough when e.g. *prate=12000000, and sel->n=1000. > Use 64-bit math to prevent this. Thanks Stephen!! -> Cc: Prashant Gaikwad<pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> -> Signed-off-by: Stephen Warren<swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> Cc: Prashant Gaikwad<pgaikwad@nvidia.com> +> Signed-off-by: Stephen Warren<swarren@nvidia.com> > --- > Prashant, can you please audit all of the Tegra clock driver to see if > there are any other instances of the same issue? Thanks. diff --git a/a/content_digest b/N1/content_digest index 9ff2b10..aa7a593 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,24 +1,20 @@ "ref\01347318758-7954-1-git-send-email-swarren@wwwdotorg.org\0" - "ref\01347318758-7954-1-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org\0" - "From\0Prashant Gaikwad <pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" - "Subject\0Re: [PATCH 1/2] ARM: tegra: fix overflow in tegra20_pll_clk_round_rate()\0" + "From\0pgaikwad@nvidia.com (Prashant Gaikwad)\0" + "Subject\0[PATCH 1/2] ARM: tegra: fix overflow in tegra20_pll_clk_round_rate()\0" "Date\0Tue, 11 Sep 2012 11:49:26 +0530\0" - "To\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\0" - "Cc\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>" - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - " Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Tuesday 11 September 2012 04:42 AM, Stephen Warren wrote:\n" - "> From: Stephen Warren<swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> From: Stephen Warren<swarren@nvidia.com>\n" ">\n" "> 32-bit math isn't enough when e.g. *prate=12000000, and sel->n=1000.\n" "> Use 64-bit math to prevent this.\n" "\n" "Thanks Stephen!!\n" "\n" - "> Cc: Prashant Gaikwad<pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" - "> Signed-off-by: Stephen Warren<swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> Cc: Prashant Gaikwad<pgaikwad@nvidia.com>\n" + "> Signed-off-by: Stephen Warren<swarren@nvidia.com>\n" "> ---\n" "> Prashant, can you please audit all of the Tegra clock driver to see if\n" "> there are any other instances of the same issue? Thanks.\n" @@ -43,4 +39,4 @@ "> \tint div;\n" > -e5db3f4a139d2e68f232fc2e7578c4bb4b67431233d40a3162a3d83d338ffa4e +c127fed038dae6fb41f109608543f3a2915332207314454c7874784981f8c8c4
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