[Qemu-devel] [PATCH] target-sparc: SPARC LEON power-down support added

[Ronald Hecht <ronald.hecht@gmx.de>]

Signed-off-by: Ronald Hecht <ronald.hecht@gmx.de>
---
  target-sparc/cpu.c         |    2 +-
  target-sparc/cpu.h         |    1 +
  target-sparc/helper.h      |    1 +
  target-sparc/ldst_helper.c |    9 +++++++++
  target-sparc/translate.c   |    5 +++++
  5 files changed, 17 insertions(+), 1 deletions(-)

diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index 0d5abb8..10563c4 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -589,7 +589,7 @@ static const sparc_def_t sparc_defs[] = {
          .mmu_trcr_mask = 0xffffffff,
          .nwindows = 8,
          .features = CPU_DEFAULT_FEATURES | CPU_FEATURE_TA0_SHUTDOWN |
-        CPU_FEATURE_ASR17 | CPU_FEATURE_CACHE_CTRL,
+        CPU_FEATURE_ASR17 | CPU_FEATURE_CACHE_CTRL | CPU_FEATURE_POWERDOWN,
      },
  #endif
  };
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index e16b7b3..eadc445 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -270,6 +270,7 @@ typedef struct sparc_def_t {
  #define CPU_FEATURE_TA0_SHUTDOWN (1 << 14) /* Shutdown on "ta 0x0" */
  #define CPU_FEATURE_ASR17        (1 << 15)
  #define CPU_FEATURE_CACHE_CTRL   (1 << 16)
+#define CPU_FEATURE_POWERDOWN    (1 << 17)
   #ifndef TARGET_SPARC64
  #define CPU_DEFAULT_FEATURES (CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP |  \
diff --git a/target-sparc/helper.h b/target-sparc/helper.h
index e3c7fdd..74ecad1 100644
--- a/target-sparc/helper.h
+++ b/target-sparc/helper.h
@@ -4,6 +4,7 @@
  DEF_HELPER_1(rett, void, env)
  DEF_HELPER_2(wrpsr, void, env, tl)
  DEF_HELPER_1(rdpsr, tl, env)
+DEF_HELPER_1(power_down, void, env)
  #else
  DEF_HELPER_2(wrpil, void, env, tl)
  DEF_HELPER_2(wrpstate, void, env, tl)
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
index 684b73b..bb5016c 100644
--- a/target-sparc/ldst_helper.c
+++ b/target-sparc/ldst_helper.c
@@ -2317,6 +2317,15 @@ void helper_stqf(CPUSPARCState *env, target_ulong 
addr, int mem_idx)
  #endif
  }
  +void helper_power_down(CPUSPARCState *env)
+{
+    env->halted = 1;
+    env->exception_index = EXCP_HLT;
+    env->pc = env->npc;
+    env->npc = env->pc + 4;
+    cpu_loop_exit(env);
+}
+
  #if !defined(CONFIG_USER_ONLY)
  #ifndef TARGET_SPARC64
  void cpu_unassigned_access(CPUSPARCState *env, target_phys_addr_t addr,
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index b95f91c..9babaa8 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -3671,6 +3671,11 @@ static void disas_sparc_insn(DisasContext * dc, 
unsigned int insn)
                                                     in the SPARCv8
                                                     manual, nop on the
                                                     microSPARC II */
+                                if ((rd == 0x13) && (dc->def->features &
+ 
CPU_FEATURE_POWERDOWN)) {
+                                    /* LEON3 power-down */
+                                    gen_helper_power_down(cpu_env);
+                                }
                                  break;
  #else
                              case 0x2: /* V9 wrccr */
-- 
1.7.2.5