From mboxrd@z Thu Jan 1 00:00:00 1970 From: Adam Jackson Subject: Re: [Intel-gfx] [PATCH 2/4] drm/dp: Update DPCD defines Date: Thu, 20 Sep 2012 10:53:35 -0400 Message-ID: <505B2DEF.1070704@redhat.com> References: <1347980330-28544-1-git-send-email-ajax@redhat.com> <1347980330-28544-2-git-send-email-ajax@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org On 9/20/12 10:10 AM, Paulo Zanoni wrote: > 2012/9/18 Adam Jackson : >> Sources: DP, eDP, and DP interop specs, and a VESA slideshow about DP >> 1.2 for the MST bits. > > All I needed to review every bit was DP spec version 1.2. Lucky you! I don't have a copy. >> +#define DP_SINK_COUNT 0x200 >> +# define DP_SINK_COUNT_MASK (31 << 0) > > My DP spec version 1.2 says "bits 7 and 5:0", but the DP 1.1 spec says > it's just 5:0 and "Bits 7 = RESERVED". So should we treat bit 7 as the > most-significant-bit? Notice that this will affect patch 4 of this > series. Oh, wild. I guess they did that so they could have twice as many downstream devices? > Idea for a follow-up patch: maybe we should try to add some comments > explaining which bits appeared only in some specific DPCD x.y > revision? That's a good idea. I'll send follow-ups for that, and to make a DP_GET_SINK_COUNT() that does the right math. - ajax